Quectel Wireless Solutions 201508UG96 UMTS/HSPA Module User Manual
Quectel Wireless Solutions Company Limited UMTS/HSPA Module
User Manual
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| Document Description | User Manual |
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| Date Submitted | 2015-08-06 00:00:00 |
| Date Available | 2015-08-06 00:00:00 |
| Creation Date | 2015-08-04 17:25:07 |
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| Document Title | User Manual |
UG96 Hardware Design UMTS/HSPA Module Series Rev. UG96_Hardware_Design_FCC Date: 2015-07-20 www.quectel.com UMTS/HSPA Module Series UG96 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Office 501, Building 13, No.99, Tianzhou Road, Shanghai, China, 200233 Tel: +86 21 5108 6236 Mail: info@quectel.com Or our local office, for more information, please visit: http://www.quectel.com/support/salesupport.aspx For technical support, to report documentation errors, please visit: http://www.quectel.com/support/techsupport.aspx Or Email: Support@quectel.com GENERAL NOTES QUECTEL OFFERS THIS INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION. THE INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. COPYRIGHT THIS INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTEL CO., LTD. TRANSMITTABLE, REPRODUCTION, DISSEMINATION AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THIS CONTENTS ARE FORBIDDEN WITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITY MODEL OR DESIGN. Copyright © Quectel Wireless Solutions Co., Ltd. 2015. All rights reserved. UG96_Hardware_Design Confidential / Released 1 / 75 UMTS/HSPA Module Series UG96 Hardware Design About the Document History Revision Date Author Description 1.0 2015-02-28 Tony GAO/ Cat WANG Initial UG96_Hardware_Design Confidential / Released 2 / 75 UMTS/HSPA Module Series UG96 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index ................................................................................................................................................... 5 Figure Index ................................................................................................................................................. 6 Introduction .......................................................................................................................................... 8 1.1. Safety Information...................................................................................................................... 9 Product Concept ................................................................................................................................ 10 2.1. General Description ................................................................................................................. 10 2.2. Directives and Standards ........................................................................................................ 11 2.3. Key Features ........................................................................................................................... 11 2.4. Functional Diagram ................................................................................................................. 13 2.5. Evaluation Board ..................................................................................................................... 15 Application Interface ......................................................................................................................... 16 3.1. General Description ................................................................................................................. 16 3.2. Pin Assignment ........................................................................................................................ 17 3.3. Pin Description......................................................................................................................... 18 3.4. Operating Modes ..................................................................................................................... 23 3.5. Power Saving........................................................................................................................... 24 3.5.1. Sleep Mode .................................................................................................................... 24 3.5.1.1. UART Application ................................................................................................. 24 3.5.1.2. USB Application with Suspend Function ............................................................. 25 3.5.1.3. USB Application without Suspend Function ........................................................ 26 3.5.2. Minimum Functionality Mode ......................................................................................... 27 3.6. Power Supply........................................................................................................................... 27 3.6.1. Power Supply Pins ......................................................................................................... 27 3.6.2. Decrease Voltage Drop .................................................................................................. 28 3.6.3. Reference Design for Power Supply .............................................................................. 29 3.6.4. Monitor the Power Supply .............................................................................................. 30 3.7. Turn on and off Scenarios ....................................................................................................... 30 3.7.1. Turn on Module .............................................................................................................. 30 3.7.2. Turn off Module .............................................................................................................. 32 3.7.2.1. Turn off Module Using AT Command ................................................................... 32 3.7.2.2. Emergency Shutdown .......................................................................................... 33 3.7.2.3. Automatic Shutdown ............................................................................................ 35 3.8. Reset the Module..................................................................................................................... 35 3.9. RTC Interface .......................................................................................................................... 37 3.10. UART Interface ........................................................................................................................ 38 3.11. USIM Card Interface ................................................................................................................ 40 UG96_Hardware_Design Confidential / Released 3 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.12. 3.13. 3.14. 3.15. USB Interface .......................................................................................................................... 42 PCM and I2C Interface ............................................................................................................ 44 Network Status Indication ........................................................................................................ 47 Operating Status Indication ..................................................................................................... 48 Antenna Interface ............................................................................................................................... 49 4.1. GSM/UMTS Antenna Interface ................................................................................................ 49 4.1.1. Pin Definition .................................................................................................................. 49 4.1.2. Operating Frequency ..................................................................................................... 49 4.1.3. Reference Design .......................................................................................................... 50 4.2. Antenna Installation ................................................................................................................. 51 4.2.1. Antenna Requirement .................................................................................................... 51 4.2.2. Install the Antenna with RF Connector .......................................................................... 51 Electrical, Reliability and Radio Characteristics ............................................................................ 54 5.1. Absolute Maximum Ratings ..................................................................................................... 54 5.2. Power Supply Ratings ............................................................................................................. 54 5.3. Operating Temperature ............................................................................................................ 55 5.4. Current Consumption .............................................................................................................. 55 5.5. RF Output Power ..................................................................................................................... 59 5.6. RF Receiving Sensitivity .......................................................................................................... 60 5.7. Electrostatic Discharge ............................................................................................................ 60 Mechanical Dimensions .................................................................................................................... 61 6.1. Mechanical Dimensions of the Module.................................................................................... 61 6.2. Footprint of Recommendation ................................................................................................. 63 6.3. Top View of the Module ........................................................................................................... 65 6.4. Bottom View of the Module...................................................................................................... 65 Storage and Manufacturing .............................................................................................................. 66 7.1. Storage..................................................................................................................................... 66 7.2. Manufacturing and Welding ..................................................................................................... 66 7.3. Packaging ................................................................................................................................ 68 Appendix A Reference....................................................................................................................... 70 Appendix B GPRS Coding Scheme ................................................................................................. 74 10 Appendix C GPRS Multi-slot Class .................................................................................................. 75 11 Appendix D EDGE Modulation and Coding Scheme ..................................................................... 76 UG96_Hardware_Design Confidential / Released 4 / 75 UMTS/HSPA Module Series UG96 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF UG96 MODULE...................................................................................... 10 TABLE 2: UG96 KEY FEATURES ...................................................................................................................... 11 TABLE 3: IO PARAMETERS DEFINITION ........................................................................................................ 18 TABLE 4: PIN DESCRIPTION ........................................................................................................................... 18 TABLE 5: OVERVIEW OF OPERATING MODES ............................................................................................. 23 TABLE 6: VBAT AND GND PINS....................................................................................................................... 27 TABLE 7: PWRKEY PIN DESCRIPTION .......................................................................................................... 30 TABLE 8: PWRDWN_N PIN DESCRIPTION .................................................................................................... 33 TABLE 9: RESET_N PIN DESCRIPTION ......................................................................................................... 35 TABLE 10: PIN DEFINITION OF THE MAIN UART INTERFACE ..................................................................... 38 TABLE 11: LOGIC LEVELS OF DIGITAL I/O .................................................................................................... 38 TABLE 12: PIN DEFINITION OF THE USIM INTERFACE ............................................................................... 41 TABLE 13: USB PIN DESCRIPTION ................................................................................................................ 43 TABLE 14: PIN DEFINITION OF PCM AND I2C INTERFACE.......................................................................... 45 TABLE 15: PIN DEFINITION OF NETWORK INDICATOR ............................................................................... 47 TABLE 16: WORKING STATE OF THE NETWORK INDICATOR..................................................................... 47 TABLE 17: PIN DEFINITION OF STATUS ........................................................................................................ 48 TABLE 18: PIN DEFINITION OF THE RF ANTENNA ....................................................................................... 49 TABLE 19: THE MODULE OPERATING FREQUENCIES ................................................................................ 49 TABLE 20: ANTENNA CABLE REQUIREMENTS ............................................................................................. 51 TABLE 21: ANTENNA REQUIREMENTS.......................................................................................................... 51 TABLE 22: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 54 TABLE 23: THE MODULE POWER SUPPLY RATINGS .................................................................................. 54 TABLE 24: OPERATING TEMPERATURE........................................................................................................ 55 TABLE 25: THE MODULE CURRENT CONSUMPTION .................................................................................. 55 TABLE 26: CONDUCTED RF OUTPUT POWER EDGE .................................................................................. 59 TABLE 27: CONDUCTED RF RECEIVING SENSITIVITY................................................................................ 60 TABLE 28: REEL PACKING .............................................................................................................................. 69 TABLE 29: RELATED DOCUMENTS ................................................................................................................ 70 TABLE 30: TERMS AND ABBREVIATIONS ...................................................................................................... 70 TABLE 31: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................................. 74 TABLE 32: GPRS MULTI-SLOT CLASSES ...................................................................................................... 75 TABLE 33: EDGE MODULATION AND CODING SCHEME ............................................................................. 76 UG96_Hardware_Design Confidential / Released 5 / 75 UMTS/HSPA Module Series UG96 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 15 FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 17 FIGURE 3: UART SLEEP APPLICATION ......................................................................................................... 25 FIGURE 4: USB APPLICATION WITH SUSPEND FUNCTION........................................................................ 26 FIGURE 5: USB SLEEP APPLICATION WITHOUT SUSPEND FUNCTION.................................................... 26 FIGURE 6: VOLTAGE DROP DURING TRANSMITTING BURST.................................................................... 28 FIGURE 7: STAR STRUCTURE OF THE POWER SUPPLY............................................................................ 29 FIGURE 8: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 29 FIGURE 9: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................... 30 FIGURE 10: TURN ON THE MODULE USING KEYSTROKE ......................................................................... 31 FIGURE 11: TIMING OF TURNING ON MODULE ........................................................................................... 31 FIGURE 12: TIMING OF TURNING OFF THROUGH AT COMMAND ............................................................. 32 FIGURE 13: TURN OFF THE MODULE USING DRIVING CIRCUIT ............................................................... 33 FIGURE 14: TURN OFF THE MODULE USING KEYSTROKE ........................................................................ 34 FIGURE 15: TIMING OF EMERGENCY SHUTDOWN ..................................................................................... 34 FIGURE 16: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 36 FIGURE 17: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 36 FIGURE 18: TIMING OF RESETTING MODULE ............................................................................................. 36 FIGURE 19: RTC SUPPLY FROM CAPACITOR .............................................................................................. 37 FIGURE 20: REFERENCE CIRCUIT OF LOGIC LEVEL TRANSLATOR ......................................................... 39 FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 39 FIGURE 22: RS232 LEVEL MATCH CIRCUIT .................................................................................................. 40 FIGURE 23: REFERENCE CIRCUIT OF THE 8-PIN USIM CARD .................................................................. 41 FIGURE 24: REFERENCE CIRCUIT OF THE 6-PIN USIM CARD .................................................................. 42 FIGURE 25: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 43 FIGURE 26: TEST POINTS OF FIRMWARE UPGRADE ................................................................................. 44 FIGURE 27: PCM MASTER MODE TIMING ..................................................................................................... 45 FIGURE 28: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 46 FIGURE 29: REFERENCE CIRCUIT OF THE NETLIGHT ............................................................................... 47 FIGURE 30: REFERENCE CIRCUIT OF THE STATUS ................................................................................... 48 FIGURE 31: REFERENCE CIRCUIT OF ANTENNA INTERFACE ................................................................... 50 FIGURE 32: DIMENSIONS OF THE UF.L-R-SMT CONNECTOR (UNIT: MM) ................................................ 52 FIGURE 33: MECHANICALS OF UF.L-LP CONNECTORS (UNIT: MM) .......................................................... 52 FIGURE 34: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 53 FIGURE 35: UG96 TOP AND SIDE DIMENSIONS ........................................................................................... 61 FIGURE 36: UG96 BOTTOM DIMENSION (TOP VIEW) .................................................................................. 62 FIGURE 37: RECOMMENDED FOOTPRINT (TOP VIEW) .............................................................................. 63 FIGURE 38: RECOMMENDED STENCIL OF UG96 (TOP VIEW) ................................................................... 64 FIGURE 39: TOP VIEW OF THE MODULE ...................................................................................................... 65 FIGURE 40: BOTTOM VIEW OF THE MODULE .............................................................................................. 65 FIGURE 41: REFLOW SOLDERING PROFILE ................................................................................................ 67 UG96_Hardware_Design Confidential / Released 6 / 75 UMTS/HSPA Module Series UG96 Hardware Design FIGURE 42: TAPE AND REEL SPECIFICATION .............................................................................................. 68 FIGURE 43: DIMENSIONS OF REEL ............................................................................................................... 69 UG96_Hardware_Design Confidential / Released 7 / 75 UMTS/HSPA Module Series UG96 Hardware Design Introduction This document defines the UG96 module and describes its hardware interface which are connected with your application and the air interface. This document can help you quickly understand module interface specifications, electrical and mechanical details. Associated with application notes and user guide, you can use UG96 module to design and set up mobile applications easily. UG96_Hardware_Design Confidential / Released 8 / 75 UMTS/HSPA Module Series UG96 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating UG96 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product. If not so, Quectel does not take on any liability for customer failure to comply with these precautions. Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a mobile while driving (even with a handsfree kit) cause distraction and can lead to an accident. You must comply with laws and regulations restricting the use of wireless devices while driving. Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it switched off. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. Consult the airline staff about the use of wireless devices on boarding the aircraft, if your device offers a Airplane Mode which must be enabled prior to boarding an aircraft. Switch off your wireless device when in hospitals or clinics or other health care facilities. These requests are desinged to prevent possible interference with sentitive medical equipment. Cellular terminals or mobiles operate over radio frequency signal and cellular network and cannot be guaranteed to connect in all conditions, for example no mobile fee or an invalid SIM card. While you are in this condition and need emergent help, please remember using emergency call. In order to make or receive call, the cellular terminal or mobile must be switched on and in a service area with adequate cellular signal strength. Your cellular terminal or mobile contains a transmitter and receiver. When it is ON , it receives and transmits radio frequency energy. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. In locations with potencially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potencially exposive atmospheres including fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders. UG96_Hardware_Design Confidential / Released 9 / 75 UMTS/HSPA Module Series UG96 Hardware Design Product Concept 2.1. General Description UG96 module is an embedded 3G wireless communication module, supports GSM/GPRS/EDGE and UMTS/HSDPA/HSUPA networks. It can also provide voice functionality1) for your specific application. UG96 offers a maximum data rate of 7.2Mbps on downlink and 5.76Mbps on uplink in HSPA mode. GPRS supports the coding schemes CS-1, CS-2, CS-3 and CS-4. EDGE supports CS1-4 and MCS1-9 coding schemes. The following table shows the frequency bands of UG96 module. Table 1: Frequency Bands of UG96 Module Module UG96 GSM 850 √ EGSM 900 √ DCS 1800 √ PCS 1900 √ UMTS 800 √ UMTS 850 √ UMTS 900 √ UMTS 1900 √ UMTS 2100 √ NOTE 1) UG96 module includes Data-only and Telematics versions. Data-only version does not support voice function, Telematics version supports it. More details about GPRS/EDGE multi-slot configuration and coding schemes, please refer to Appendix B, C and D. With a tiny profile of 26.5mm × 22.5mm × 2.2mm, UG96 can meet almost all requirements for M2M application such as automotive, metering, tracking system, security solutions, routers, wireless POS, etc.. UG96 is an SMD type module, which can be embedded in application through its 102 LGA pads. UG96 is integrated with internet service protocols like TCP/UDP and PPP. Extended AT commands have been developed for you to use these internet service protocols easily. UG96_Hardware_Design Confidential / Released 10 / 75 UMTS/HSPA Module Series UG96 Hardware Design 2.2. Directives and Standards The UG96 module is designed to comply with the FCC statements. FCC ID: XMR201508UG96 The Host system using UG96 should have label “contains FCC ID: XMR201508UG96”. 2.2.1. 2.2.1. FCC Statement Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. 2.2.2. FCC Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator and your body as well as kept minimum 20cm from radio antenna depending on the Mobile status of this module usage. This module should NOT be installed and operating simultaneously with other radio. The manual of the host system, which uses UG96, must include RF exposure warning statement to advice user should keep minimum 20cm from the radio antenna of UG96 module depending on the Mobile status. Note: If a portable device (such as PDA) uses UG96 module, the device needs to do permissive change and SAR testing. The following list indicates the performance of antenna gain in certificate testing. Part Number Frequency Range (MHz) Peak Gain (XZ-V) Average Gain(XZ-V) VS WR 3R007 UMTS800:830～885MHz UMTS850/GSM850:824～894MHz UMTS900/EGSM900:880～960MHz DCS1800:1710～1880MHz UMTS1900/PCS1900: 1850～1990MHz UMTS2100:1920～2170MHz 1 dBi typ. 1 dBi typ. 2 max Impedance 50Ω 2.3. Key Features The following table describes the detailed features of UG96 module. Table 2: UG96 Key Features Feature UG96_Hardware_Design Details Confidential / Released 11 / 75 UMTS/HSPA Module Series UG96 Hardware Design Power Supply Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V Frequency Bands GSM 4-band: 850/900/1800/1900MHz UMTS 5-band: 800/850/900/1900/2100MHz Transmission Data HSDPA category 8: Max 7.2Mbps HSUPA category 6: Max 5.76Mbps UMTS: Max 384kbps (DL)/Max 384kbps (UL) EDGE: Max 236.8kbps (DL)/Max 236.8kbps (UL) GPRS: Max 85.6kbps (DL)/Max 85.6kbps (UL) CSD: 14.4kbps HSPA/UMTS Features Compliant with 3GPP Release 7 WCDMA data rate is corresponded with 3GPP R99/R4 384kbps on downlink and 384kbps on uplink Support both QPSK and 16-QAM modulations GSM/GPRS/EDGE Data Features GPRS: Support GPRS multi-slot class 12 Coding scheme: CS-1, CS-2, CS-3 and CS-4 Maximum of four Rx time slots per frame EDGE: Support EDGE multi-slot class 12 Support GMSK and 8-PSK for different MCS (Modulation and Coding scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 CSD: CSD transmission rates: 14.4kbps non-transparent Support Unstructured Supplementary Services Data (USSD) Internet Protocol Features Support TCP/UDP/PPP protocols Support the protocols PAP (Password Authentication Protocol) and CHAP (Challenge Handshake Authentication Protocol) usually used for PPP connections SMS Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: SIM card by default USIM Interface Support USIM card: 1.8V, 3.0V Support USIM and SIM PCM Interface Used for audio function with external codec Supports 8, 16, 32 bit mode with short frame synchronization Support master mode UART Interface Support one UART interface 7-wire on UART interface, without DSR Support RTS and CTS hardware flow control UG96_Hardware_Design Confidential / Released 12 / 75 UMTS/HSPA Module Series UG96 Hardware Design Baud rate 300 to 921600bps Default autobauding 4800 to 115200bps Used for AT command, data transmission or firmware upgrade Multiplexing function USB Interface Compliant with USB 1.1/2.0 specification (slave only), the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, software debug and firmware upgrade USB Driver: Support Windows XP, Windows Vista, Windows 7, Windows 8, Windows CE5.0/6.0*, Linux, Android AT Commands Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT commands Real Time Clock Implemented Network Indication One pin NETLIGHT to indicate network connectivity status Antenna Interface GSM/UMTS antenna, 50Ω Physical Characteristics Size: 22.5±0.15 × 26.5±0.15 × 2.2±0.2mm Interface: LGA Weight: 3.1g Temperature Range Normal operation: -35°C ~ +80°C Restricted operation: -40°C ~ -35°C and +80°C ~ +85°C 1) Storage temperature: -45°C ~ +90°C Firmware Upgrade USB interface or UART interface RoHS All hardware components are fully compliant with EU RoHS directive NOTES 1. 1) Means when the module works within this temperature range, RF performance might degrade. For example, the frequency error or the phase error would increase. 2. * means this feature is under development. 2.4. Functional Diagram The following figure shows a block diagram of UG96 and illustrates the major functional parts. RF transceiver Baseband UG96_Hardware_Design Confidential / Released 13 / 75 UMTS/HSPA Module Series UG96 Hardware Design DDR+NAND flash Radio frequency Peripheral interface --UART interface --USIM card interface --USB interface --PCM interface --I2C interface --Status indication --Control interface UG96_Hardware_Design Confidential / Released 14 / 75 UMTS/HSPA Module Series UG96 Hardware Design GSM TX HB GSM TX LB B1 B1 B2 B2/PCS1900 PA DC/DC B5/B6 B5/B6/GSM850 B8 PM_L ASM RF_ANT B8/GSM900 Duplexer PM_H DCS1800 VBAT_RF PMU RF Transceiver 26MHz DCXO Reset I2C PCM UART USB USIM NETLIGHT STATUS VBAT_BB VDD_EXT VRTC PMU PWRKEY PWRDWN_N RESET_N Baseband MCP Nand+DDR 32kHz Figure 1: Functional Diagram 2.5. Evaluation Board In order to help you to develop applications with UG96, Quectel supplies an evaluation board (UMTS<E-EVB), RS-232 to USB cable, USB data cable, power adapter, earphone, antenna and other peripherals to control or test the module. For details, please refer to document [2]. UG96_Hardware_Design Confidential / Released 15 / 75 UMTS/HSPA Module Series UG96 Hardware Design Application Interface 3.1. General Description UG96 is equipped with a 62-pin 1.1mm pitch SMT pads plus 40-pin ground pads and reserved pads that connect to customer’s cellular application platform. Sub-interfaces included in these pads are described in detail in the following chapters: Power supply RTC interface UART interface USIM interface USB interface PCM interface Status indication UG96_Hardware_Design Confidential / Released 16 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.2. Pin Assignment USB_DM 10 RESERVED VBAT_RF GND GND VBAT_RF GND VRTC RESERVED GND GND RF_ANT RESERVED GND 11 101 50 USB_DP 102 63 80 81 51 82 52 USB_VBUS 53 54 55 PCM_DIN PCM_DOUT 56 57 58 PCM_CLK PCM_SYNC 59 60 GND 61 62 RESERVED RESERVED GND The following figure shows the pin assignment of the UG96 module. 79 100 99 83 98 78 64 84 97 77 65 85 96 76 66 86 95 75 67 87 94 74 49 RESERVED 48 GND 47 USIM_GND 46 USIM_CLK 45 USIM_DATA 44 USIM_RST 43 USIM_VDD 42 USIM_PRESENCE 41 I2C_SDA 40 I2C_SCL 39 RI RESERVED 12 RESERVED 13 RESERVED 14 PWRKEY 15 PWRDWN_N 16 34 RXD RESET_N 17 33 VBAT_BB RESERVED 18 32 VBAT_BB 29 30 31 28 GND ANT VDD_EXT RESERVED RESERVED PCM 73 DTR CLK_OUT RESERVED USIM RESERVED RESERVED UART 27 72 26 71 25 70 24 69 23 92 22 91 21 90 20 89 RESERVED USB 93 STATUS AP_READY POWER 88 NETLIGHT 19 68 GND 38 DCD 37 RTS 36 CTS 35 TXD RESERVED OTHERS Figure 2: Pin Assignment (Top View) NOTES 1. 2. Keep all RESERVED pins and unused pins unconnected. GND pads should be connected to ground in the design. UG96_Hardware_Design Confidential / Released 17 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.3. Pin Description The following tables show the UG96’s pin definition. Table 3: IO Parameters Definition Type Description IO Bidirectional input/output DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain Table 4: Pin Description Power Supply Pin Name VBAT_BB VBAT_RF VRTC VDD_EXT Pin No. 32, 33 52, 53 51 29 UG96_Hardware_Design I/O Description DC Characteristics PI Power supply for module baseband part. Vmax=4.3V Vmin=3.3V Vnorm=3.8V PI Power supply for module RF part. Vmax=4.3V Vmin=3.3V Vnorm=3.8V PI/ PO Power supply for internal RTC circuit. Vnorm=1.8V when VBAT≥3.3V VI=1V~1.9V at IIN max=2uA when VBAT is not applied If unused, keep this pin open. PO Provide 1.8V for external circuit. Vnorm=1.8V IOmax=20mA Power supply for external GPIO’s pull up circuits. Confidential / Released Comment It must be able to provide sufficient current in a transmitting burst which typically rises to 2.0A. 18 / 75 UMTS/HSPA Module Series UG96 Hardware Design If unused, keep this pin open. GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 Ground Turn On/Off Pin Name Description DC Characteristics Comment Turn on the module. RPU≈200kΩ VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally. Active low. Turn off the module. RPU≈4.7kΩ VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally. Active low. If unused, keep this pin open. DI Reset the module. RPU≈200kΩ VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally. Active low. If unused, keep this pin open. I/O Description DC Characteristics Comment DO Indicate the module operating status. VOHmin=1.3V VOLmax=0.5V 1.8V power domain. If unused, keep this pin open. 21 DO Indicate the module network status. VOHmin=1.3V VOLmax=0.5V 1.8V power domain. If unused, keep this pin open. Pin Name Pin No. I/O Description DC Characteristics Comment USB_VBUS PI USB insert detection. Vmax=5.25V Vmin=2.5V Vnorm=5.0V USB insert detection. PWRKEY PWRDWN_N RESET_N Pin No. 15 16 17 I/O DI DI Status Indication Pin Name STATUS NETLIGHT Pin No. 20 USB Interface UG96_Hardware_Design Confidential / Released 19 / 75 UMTS/HSPA Module Series UG96 Hardware Design IO USB differential data bus. Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. 10 IO USB differential data bus. Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. Pin Name Pin No. I/O Description DC Characteristics Comment USIM_GND 47 USB_DP USB_DM USIM Interface USIM_VDD USIM_DATA USIM_CLK USIM_RST 43 45 46 44 UG96_Hardware_Design Specified ground for USIM card. PO IO DO DO Power supply for USIM card. Data signal of USIM card. Clock signal of USIM card. Reset signal of USIM card. For 1.8V USIM: Vmax=1.85V Vmin=1.75V For 3.0V USIM: Vmax=2.9V Vmin=2.8V For 1.8V USIM: VILmax=0.35V VIHmin=1.25V VOLmax=0.25V VOHmin=1.25V For 3.0V USIM: VILmax=0.5V VIHmin=2.05V VOLmax=0.25V VOHmin=2.05V Either 1.8V or 3.0V is supported by the module automatically. Pull-up to USIM_VDD with 4.7K resistor internally. For 1.8V USIM: VOLmax=0.25V VOHmin=1.25V For 3.0V USIM: VOLmax=0.25V VOHmin=2.05V For 1.8V USIM: VOLmax=0.25V VOHmin=1.25V For 3.0V USIM: VOLmax=0.3V VOHmin=2.05V Confidential / Released 20 / 75 UMTS/HSPA Module Series UG96 Hardware Design USIM_ PRESENCE 42 DI USIM card input detection. VILmax=0.35V VIHmin=1.3V VIHmax=1.85V 1.8V power domain. External pull-up resistor is required. Main UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment RI 39 DO Ring indicator. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. DO Data carrier detection. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. Clear to send. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. Request to send. VILmax=0.35V VIHmin=1.3V VIHmax=1.85V 1.8V power domain. If unused, keep this pin open. Data terminal ready. VILmax=0.35V VIHmin=1.3V VIHmax=1.85V 1.8V power domain. If unused, keep this pin open. Transmit data. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. Comment DCD CTS RTS DTR TXD 38 36 37 30 35 DO DI DI DO 34 DI Receive data. VILmax=0.35V VIHmin=1.3V VIHmax=1.85V Pin Name Pin No. I/O Description DC Characteristics RF_ANT 60 IO RF antenna. 50Ω impedance Pin No. I/O Description DC Characteristics Comment PCM data input. VILmin=-0.3V VILmax=0.35V VIHmin=1.3V VIHmax=1.85V 1.8V power domain. If unused, keep this pin open. PCM data output. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. RXD RF Interface PCM Interface Pin Name PCM_IN PCM_OUT UG96_Hardware_Design DI DO Confidential / Released 21 / 75 UMTS/HSPA Module Series UG96 Hardware Design PCM_SYNC PCM_CLK DO PCM data frame sync signal. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. In master mode, it is an output signal. If unused, keep this pin open. DO PCM data bit clock. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. In master mode, it’s an output signal. If unused, keep this pin open. Pin No. I/O Description DC Characteristics Comment I2C Interface Pin Name I2C_SCL I2C_SDA 40 OD I2C serial clock. 1.8V power domain. External pull-up resistor is required. If unused, keep this pin open. 1.8V power domain. External pull-up resistor is required. If unused, keep this pin open. 41 OD I2C serial data. Pin No. I/O Description DC Characteristics Comment DI Application processor sleep state detection. VILmin=-0.3V VILmax=0.35V VIHmin=1.3V VIHmax=1.85V 1.8V power domain. If unused, keep this pin open. Other Pins Pin Name AP_READY CLK_OUT 19 25 DO Clock output. I/O Description Provide a digital clock output for an external audio codec. If unused, keep this pin open. RESERVED Pins Pin Name Pin No. RESERVED 1, 2, 11~14, 18, 22~24, 26~28, UG96_Hardware_Design DC Characteristics Reserved Confidential / Released Comment Keep these pins unconnected. 22 / 75 UMTS/HSPA Module Series UG96 Hardware Design 49, 56, 57, 63~66, 75~78, 83~88, 92~99 NOTE The function of AP_READY is under development. 3.4. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Details GSM Idle The module has registered to the GSM network and is ready to send and receive data. GSM Talk/Data GSM connection is ongoing. In this mode, the power consumption is decided by the configuration of power control level (PCL), dynamic DTX control and the working RF band. GPRS Idle The module is ready for GPRS data transfer, but no data transfer is going on. In this case, power consumption depends on network setting and GPRS configuration. GPRS Data There is GPRS data in transfer (PPP, TCP or UDP). In this mode, power consumption is decided by the PCL, working RF band and GPRS multi-slot configuration. EDGE Idle The module is ready for data transfer in EDGE mode, but no data is currently sent or received. In this case, power consumption depends on network settings and EDGE configuration. EDGE Data There is EDGE data in transfer (PPP, TCP or UDP). UMTS Idle The module has registered to the UMTS network and the module is ready to send and receive data. UMTS Talk/Data UMTS connection is ongoing. In this mode, the power consumption is decided by network setting (e.g. TPC pattern) and data transfer rate. Normal Operation UG96_Hardware_Design Confidential / Released 23 / 75 UMTS/HSPA Module Series UG96 Hardware Design HSPA Idle The module has registered to the HSPA network and the module is ready to send and receive data. HSPA Data HSPA data transfer is ongoing. In this mode, the power consumption is decided by network setting (e.g. TPC pattern) and data transfer rate. Minimum Functionality Mode AT+CFUN command can set the module entering into a minimum functionality mode without removing the power supply. In this case, both RF function and USIM card will be invalid. Sleep Mode In this mode, the current consumption of the module will be reduced to the minimal level. During this mode, the module can still receive paging message, SMS and voice call from the network normally. Power Down Mode In this mode, the power management unit shuts down the power supply for the baseband part and RF part. Only the power supply for RTC remains. Software is not active. The serial interface is not accessible. Operating voltage (connected to VBAT_RF and VBAT_BB) remains applied. 3.5. Power Saving .5.1. Sleep Mode UG96 is able to reduce its current consumption to a minimum value during the sleep mode. The following section describes power saving procedure of UG96. 3.5.1.1. UART Application If application processor communicates with module via UART interface, the following preconditions can let the module enter into the sleep mode. Execute AT command AT+QCFG="uart/power",0,0 to set UART into auto on/off mode. Execute AT command AT+QSCLK=1 to enable the sleep mode. Drive DTR to high level. UG96_Hardware_Design Confidential / Released 24 / 75 UMTS/HSPA Module Series UG96 Hardware Design The following figure shows the connection between the module and application processor. Processor Module RXD TXD TXD RXD RI EINT DTR GPIO AP_READY GPIO GND GND Figure 3: UART Sleep Application The RI of module is used to wake up the processor, and AP_READY will detect the sleep state of processor (can be configured to high level or low level detection). You should pay attention to the level match shown in dotted line between module and processor. Drive DTR pin to low level to wake up the module. In sleep mode for UART application, the UART port is not accessible. 3.5.1.2. USB Application with Suspend Function If application processor communicates with module via USB interface, and processor supports USB suspend function, the following preconditions can let the module enter into the sleep mode. Execute AT command AT+QCFG="uart/power",0,0 to set UART into auto on/off mode. Execute AT command AT+QSCLK=1 to enable the sleep mode. The processor’s USB bus which is connected with the module USB interface enters into suspended state. UG96_Hardware_Design Confidential / Released 25 / 75 UMTS/HSPA Module Series UG96 Hardware Design The following figure shows the connection between the module and processor. Processor Module VDD USB_VBUS USB_DP USB_DP USB_DM USB_DM RI EINT GND GND Figure 4: USB Application with Suspend Function When the processor’s USB bus returns to resume state, the module will be woken up. 3.5.1.3. USB Application without Suspend Function If application processor communicates with module via USB interface, and processor does not support USB suspend function, you should disconnect USB_VBUS with additional control circuit to let the module enter into sleep mode. Execute AT command AT+QCFG="uart/power",0,0 to set UART into auto on/off mode. Execute AT command AT+QSCLK=1 to enable the sleep mode. Disconnect USB_VBUS. Supply power to USB_VBUS will wake up the module. The following figure shows the connection between the module and application processor. Module Processor GPIO USB_VBUS Power Switch VDD USB_DP USB_DP USB_DM USB_DM RI EINT GND GND Figure 5: USB Sleep Application without Suspend Function UG96_Hardware_Design Confidential / Released 26 / 75 UMTS/HSPA Module Series UG96 Hardware Design NOTES 1. In sleep mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. 2. The function of AP_READY is under development. .5.2. Minimum Functionality Mode Minimum functionality mode reduces the functionality of the module to minimum level, thus minimizes the current consumption at the same time. This mode can be set as below: Command AT+CFUN provides the choice of the functionality levels:=0, 1, 4. AT+CFUN=0: Minimum functionality, RF part and USIM card will be closed. AT+CFUN=1: Full functionality (by default). AT+CFUN=4: Disable RF function (airplane mode). All AT commands related to RF function are not accessible. For detailed information about command AT+CFUN, please refer to document [1]. 3.6. Power Supply .6.1. Power Supply Pins UG96 provides four VBAT pins dedicated to connect with the external power supply. There are two separate voltage domains for VBAT. VBAT_RF with two pads for module RF. VBAT_BB with two pads for module baseband. The following table shows the VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 52, 53 Power supply for module RF part. 3.3 3.8 4.3 VBAT_BB 32, 33 Power supply for module baseband part. 3.3 3.8 4.3 UG96_Hardware_Design Confidential / Released 27 / 75 .6.2. UMTS/HSPA Module Series UG96 Hardware Design GND 3, 31, 48, 50 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 Ground Decrease Voltage Drop The power supply range of the module is 3.3V~ 4.3V. Make sure the input voltage will never drop below 3.3V. If the voltage drops below 3.3V, the module will turn off automatically. The following figure shows the voltage drop during transmitting burst in 2G network, the voltage drop will be less in 3G network. burst burst ≤ 2.0A Current VBAT < 400mV Min. 3.3V Figure 6: Voltage Drop during Transmitting Burst To decrease voltage drop, a bypass capacitor of about 100µF with low ESR should be used. Multi-layer ceramic chip (MLCC) capacitor can provide the best combination of low ESR. The main power supply from an external application has to be a single voltage source and splits into to two sub paths with star structure. The width of VBAT_BB trace should be no less than 1mm, and the width of VBAT_RF trace should be no less than 2mm, and the principle of the VBAT trace is the longer, the wider. Three ceramic capacitors (100nF, 33pF, 10pF) are recommended to be applied to the VBAT pins. The capacitors should be placed close to the UG96’s VBAT pins. In addition, in order to get a stable power source, it is suggested that you should use a zener diode of which reverse zener voltage is 5.1V and dissipation power is more than 0.5W. The following figure shows star structure of the power supply. UG96_Hardware_Design Confidential / Released 28 / 75 UMTS/HSPA Module Series UG96 Hardware Design VBAT VBAT_RF VBAT_BB C2 C3 C4 100nF 33pF 10pF C1 D1 100uF 5.1V C5 100uF C6 C7 C8 100nF 33pF 10pF Module Figure 7: Star Structure of the Power Supply 3.6.3. Reference Design for Power Supply The power design for the module is very important, since the performance of power supply for the module largely depends on the power source. The power supply is capable of providing the sufficient current up to 2A at least. If the voltage drop between the input and output is not too high, it is suggested that a LDO should be used to supply power for module. If there is a big voltage difference between the input source and the desired output (VBAT), a buck converter is preferred to be used as a power supply. The following figure shows a reference design for +5V input power source. The designed output for the power supply is about 3.8V and the maximum load current is 3A. MIC29302WU U1 DC_IN VBAT 470uF R5 4.7K MCU_POWER _ON/OFF GND ADJ 100nF 51K OUT 4 R1 C2 C1 EN 2 IN R2 100K 1% R3 47K 1% R4 470R C3 C4 470uF 100nF R6 47K Figure 8: Reference Circuit of Power Supply UG96_Hardware_Design Confidential / Released 29 / 75 .6.4. .7.1. UMTS/HSPA Module Series UG96 Hardware Design NOTE It is suggested that you should switch off power supply for module in abnormal state, and then switch on power to restart module. Monitor the Power Supply The command AT+CBC can be used to monitor the VBAT_BB voltage value displayed in millivolt. For more details, please refer to document [1]. 3.7. Turn on and off Scenarios Turn on Module Turn on the module using the PWRKEY. The following table shows the pin definition of PWRKEY. Table 7: PWRKEY Pin Description Pin Name PWRKEY Pin No. 15 Description DC Characteristics Comment Turn on the module. VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally with 200kΩ resistor. When UG96 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level at least 100ms. It is recommended to use an open drain/collector driver to control the PWRKEY. The STATUS pin output a high level after UG96 is turned on. A simple reference circuit is illustrated in the following figure. PWRKEY ≥ 100ms 4.7K Turn on pulse 47K Figure 9: Turn on the Module Using Driving Circuit UG96_Hardware_Design Confidential / Released 30 / 75 UMTS/HSPA Module Series UG96 Hardware Design The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger. A reference circuit is shown in the following figure. S1 PWRKEY TVS Close to S1 Figure 10: Turn on the Module Using Keystroke The turn on scenarios is illustrated as the following figure. ≥ 3.5s VBAT ≥ 100ms VIH ≥ 1.3V PWRKEY (Input) VIL ≤ 0.5V RESET_N >2.3s STATUS Module Status OFF BOOTING RUNNING Figure 11: Timing of Turning on Module NOTE ① Make sure that VBAT is stable before pulling down PWRKEY pin, the recommended delay time is at least 30ms. It is not suggested that pull down PWRKEY pin all the time. UG96_Hardware_Design Confidential / Released 31 / 75 UMTS/HSPA Module Series UG96 Hardware Design .7.2. Turn off Module The following procedures can be used to turn off the module: Normal power down procedure: Turn off the module using command AT+QPOWD. Emergency power down procedure: Turn off the module using the PWRDWN_N pin. Automatic shutdown: Turn off the module automatically if under-voltage or over-voltage is detected. 3.7.2.1. Turn off Module Using AT Command There are several different ways to turn off the module. It is recommended to turn off the module from AT command AT+QPOWD. It is a safe way to turn off the module. This command will let the module log off from the network and allow the firmware to save important data before completely disconnecting the power supply. The power-down scenario is illustrated as the following figure. VBAT Log off network about 2s to 40s RXD AT+QPOWD STATUS Module RUNNING Status Power-down procedure OFF Figure 12: Timing of Turning off through AT Command During power-down procedure, module will log off from network and save important data. After logging off, module sends out “OK”, and then sends out “POWERED DOWN” and shuts down the internal power supply. The power on VBAT pins is not allowed to be turned off before the URC “POWERED DOWN” is output to avoid data loss. If logging off is not done within 40s, module will shut down internal power supply forcibly. After that moment, the module enters the power down mode, no other AT commands can be executed, only the RTC is still active. Please refer to document [1] for details about the AT command of AT+QPOWD. UG96_Hardware_Design Confidential / Released 32 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.7.2.2. Emergency Shutdown The module can be shut down by the pin PWRDWN_N. It should only be used under emergent situation. The following table shows the pin definition of PWRDWN_N. Table 8: PWRDWN_N Pin Description Pin Name PWRDWN_N Pin No. 16 Description Turn off the module DC Characteristics Comment VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally with 4.7kΩ resistor. Driving the PWRDWN_N to a low level voltage at least 100ms, the module will execute power-down procedure after PWRDWN_N is released. It is recommended to use an open drain/collector driver to control the PWRDWN_N. The level of STATUS pin is low after UG96 is turned off. A simple reference circuit is illustrated in the following figure. PWRDWN_N ≥ 100ms 4.7K Turn off pulse 47K Figure 13: Turn off the Module Using Driving Circuit The other way to control the PWRDWN_N is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger. A reference circuit is shown in the following figure. UG96_Hardware_Design Confidential / Released 33 / 75 UMTS/HSPA Module Series UG96 Hardware Design S2 PWRDWN_N TVS Close to S2 Figure 14: Turn off the Module Using Keystroke The emergency shutdown scenario is illustrated as the following figure. VBAT PWRDWN_N ≥100ms STATUS Module Status RUNNING Power-down procedure OFF Figure 15: Timing of Emergency Shutdown NOTE Use the PWRDWN_N only when turning off the module by the command AT+QPOWD or the RESET_N pin failed. UG96_Hardware_Design Confidential / Released 34 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.7.2.3. Automatic Shutdown The module will constantly monitor the voltage applied on the VBAT, if the voltage ≤ 3.5V, the following URC will be presented: +QIND: “vbatt”,-1 If the voltage ≥ 4.21V, the following URC will be presented: +QIND: “vbatt”,1 The uncritical voltage is 3.3V to 4.3V, If the voltage > 4.3V or < 3.3V the module would automatically shut down itself. If the voltage < 3.3V, the following URC will be presented: +QIND: “vbatt”,-2 If the voltage > 4.3V, the following URC will be presented: +QIND: “vbatt”,2 NOTE The value of voltage threshold can be revised by AT command, refer to document [1] for details. 3.8. Reset the Module The RESET_N can be used to reset the module. Table 9: RESET_N Pin Description Pin Name RESET_N Pin No. 17 Description DC Characteristics Comment Reset the module. VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally with 200kΩ resistor. Active low. The module can be reset by driving the RESET_N to a low level voltage for more than 100ms and then releasing. UG96_Hardware_Design Confidential / Released 35 / 75 UMTS/HSPA Module Series UG96 Hardware Design The recommended circuit is similar to the PWRKEY control circuit. You can use open drain/collector driver or button to control the RESET_N. RESET_N ≥ 100ms 4.7K Reset pulse 47K Figure 16: Reference Circuit of RESET_N by Using Driving Circuit S3 RESET_N TVS Close to S3 Figure 17: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated as the following figure. VBAT ≥ 100ms > 5s VIH ≥ 1.3V RESET_N VIL ≤ 0.5V > 3s STATUS Module Status RUNNING OFF RESTARTING RUNNING Figure 18: Timing of Resetting Module UG96_Hardware_Design Confidential / Released 36 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.9. RTC Interface The RTC (Real Time Clock) can be powered by an external capacitor through the pin VRTC when the module is powered down and there is no power supply for the VBAT. If the voltage supply at VBAT is disconnected, the RTC can be powered by the capacitor. The capacitance determines the duration of buffering when no voltage is applied to UG96. The capacitor is charged from the internal LDO of UG96 when there is power supply for the VBAT. A serial 1KΩ resistor has been placed on the application inside the module. It limits the input current of the capacitor. The following figure shows the reference circuit for VRTC backup. VRTC Large Capacitance Capacitor 1K RTC Core Module Figure 19: RTC Supply from Capacitor In order to evaluate the capacitance of capacitor according to the backup time, you have to consider the following parameters: VRTC - The starting voltage of the capacitor. (Volt) VRTCMIN - The minimum voltage acceptable for the RTC circuit.(Volt) I - The current consumption of the RTC circuitry when VBAT = 0.(Ampere) B Time - Backup Time.(Second) C - The backup capacitance. (Farad) When the power is off and only VRTC is running, the way of calculating the backup capacitor as follows: C= B Time *I/ (VRTC-VRTCMIN) For example, when the capacitor is 1000uF: VRTC=1.8V VRTCMIN=1.0V I=2uA C=1000uF The backup time is about 400s. UG96_Hardware_Design Confidential / Released 37 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.10. UART Interface The module provides 7 lines UART interface. UART interface supports 300, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800 and 921600bps baud rate, and the default is auto-baud rate 4800~115200. This interface can be used for data transmission, AT communication or firmware upgrade. The module is designed as the DCE (Data Communication Equipment), following the traditional DCE-DTE (Data Terminal Equipment) connection. The following table shows the pin definition of UART interface. Table 10: Pin Definition of the Main UART Interface Pin Name Pin No. I/O Description Comment DTR 30 DI Data terminal ready 1.8V power domain RXD 34 DI Receive data 1.8V power domain TXD 35 DO Transmit data 1.8V power domain CTS 36 DO Clear to send 1.8V power domain RTS 37 DI Request to send 1.8V power domain DCD 38 DO Data carrier detection 1.8V power domain RI 39 DO Ring indicator 1.8V power domain The logic levels are described in the following table. Table 11: Logic Levels of Digital I/O Parameter Min. Max. Unit VIL -0.3 0.35 VIH 1.3 1.85 VOL 0.25 VOH 1.55 1.8 UG96_Hardware_Design Confidential / Released 38 / 75 UMTS/HSPA Module Series UG96 Hardware Design UG96 provides one 1.8V UART interface. A level shifter should be used if your application is equipped with a 3.3V UART interface. A level shifter TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows the reference design of the TXS0108EPWR. 0.1uF VDD_EXT VCCA 120K VCCB VDD_3.3V 0.1uF 10K OE GND RI A1 B1 RI_3.3V DCD A2 B2 DCD_3.3V CTS A3 TXS0108EPWR B3 CTS_3.3V RTS A4 B4 RTS_3.3V DTR A5 B5 DTR_3.3V TXD A6 B6 TXD_3.3V RXD A7 B7 A8 B8 51K RXD_3.3V 51K Figure 20: Reference Circuit of Logic Level Translator Please visit http://www.ti.com for more information. Another example with transistor translation circuit is shown as below. The circuit of dotted line can refer to the circuit of solid line. Please pay attention to direction of connection. Input dotted line of module should refer to input solid line of the module. Output dotted line of module should refer to output solid line of the module. The transistor translation circuit supports a maximum data rate of 0.5Mbps. 4.7K VDD_EXT VDD_EXT 1nF MCU/ARM 4.7K Module /TXD RXD /RXD TXD 4.7K VCC_MCU 1nF 4.7K VDD_EXT /RTS /CTS GPIO EINT GPIO GND RTS CTS DTR RI DCD GND Figure 21: Reference Circuit with Transistor Circuit UG96_Hardware_Design Confidential / Released 39 / 75 UMTS/HSPA Module Series UG96 Hardware Design The following figure is an example of connection between UG96 and PC. A voltage level translator and a RS-232 level translator chip must be inserted between module and PC, since the UART interface does not support the RS-232 level, while supports the 1.8V CMOS level only. 3.3V OE DCD TXD CTS RI DCD_1.8V TXD_1.8V DCD_3.3V TXD_3.3V DIN1 DIN2 DOUT1 DOUT2 CTS_1.8V RI_1.8V CTS_3.3V RI_3.3V DOUT3 DOUT4 DOUT5 RXD DTR RTS GND RXD_1.8V DTR_1.8V RTS_1.8V GND RXD_3.3V DTR_3.3V RTS_3.3V DIN3 DIN4 DIN5 R1OUTB ROUT1 ROUT2 ROUT3 5 GND DCD RXD CTS RI DSR RIN1 RIN2 RIN3 3 TXD 4 DTR 7 RTS VDD_EXT VCCA VCCB VCC GND 3.3V Module TXS0108EPWR FORCEON /FORCEOFF /INVALID Translator DB9M PC side Figure 22: RS232 Level Match Circuit NOTES 1. 2. 3. 4. The module disables the hardware flow control by default. When hardware flow control is required, RTS and CTS should be connected to the host. AT command AT+IFC=2,2 is used to enable hardware flow control. AT command AT+IFC=0,0 is used to disable the hardware flow control. For more details, please refer to document [1]. Rising edge on DTR will let the module exit from the data mode by default. It can be disabled by AT commands. Refer to document [1] for details. DCD is used as data mode indication. Refer to document [1] for details. It is suggested that you should set USB_DP, USB_DM and USB_VBUS pins as test points and then place these test points on the DTE for debug. 3.11. USIM Card Interface The USIM card interface circuitry meets ETSI and IMT-2000 SIM interface requirements. Both 1.8V and 3.0V USIM cards are supported. UG96_Hardware_Design Confidential / Released 40 / 75 UMTS/HSPA Module Series UG96 Hardware Design Table 12: Pin Definition of the USIM Interface Pin Name Pin No. I/O Description Comment USIM_PRESENCE 42 USIM card detection input. 1.8V power domain. Either 1.8V or 3.0V is supported by the module automatically. DI USIM_VDD 43 PO Power supply for USIM card. USIM_RST 44 DO Reset signal of USIM card. USIM_DATA 45 IO Data signal of USIM card. USIM_CLK 46 DO Clock signal of USIM card. USIM_GND 47 Pull-up to USIM_VDD with 4.7k resistor internally. Specified ground for USIM card. UG96 supports USIM card hot-plugging via the USIM_PRESENCE pin. The following figure shows the reference design of the 8-pin USIM card. VDD_EXT USIM_VDD 15K 51K 100nF USIM_GND/GND USIM holder USIM_VDD Module VCC RST USIM_RST 22R USIM_CLK USIM_PRESENCE 22R USIM_DATA 22R CLK 33pF 33pF GND VPP IO GND 33pF ESD GND GND Figure 23: Reference Circuit of the 8-Pin USIM Card If you do not need the USIM card detection function, keep USIM_PRESENCE unconnected. The reference circuit for using a 6-pin USIM holder is illustrated as the following figure. UG96_Hardware_Design Confidential / Released 41 / 75 UMTS/HSPA Module Series UG96 Hardware Design USIM_VDD USIM_GND Module USIM_VDD USIM_RST USIM_CLK USIM_DATA 15K 100nF USIM holder VCC RST CLK 22R GND VPP IO 22R 22R 33pF 33pF 33pF ESD GND GND Figure 24: Reference Circuit of the 6-Pin USIM Card In order to enhance the reliability and availability of the USIM card in customer’s application, please follow the criteria below in the USIM circuit design: Keep layout of USIM card as close as possible to the module. Assure the length of the trace is as less than 200mm as possible. Keep USIM card signal away from RF and VBAT alignment. Assure the ground between module and USIM holder short and wide. Keep the width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. The decouple capacitor of USIM_VDD should be less than 1uF and must be near to USIM holder. To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away with each other and shield them with surrounded ground. In order to offer good ESD protection, it is recommended to add TVS such as WILL (http://www.willsemi.com). The 22Ω resistors should be added in series between the module and the USIM card so as to suppress the EMI spurious transmission and enhance the ESD protection. The 33pF capacitors are used for filtering interference of EGSM900. Please note that the USIM peripheral circuit should be close to the USIM holder. The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive occasion is applied, and should be placed close to the USIM holder. 3.12. USB Interface UG96 contains one integrated Universal Serial Bus (USB) transceiver which complies with the USB 1.1/2.0 specification and supports high speed (480Mbps) and full speed (12Mbps) mode. The USB interface is primarily used for AT command, data transmission, software debug and firmware upgrade. UG96_Hardware_Design Confidential / Released 42 / 75 UMTS/HSPA Module Series UG96 Hardware Design The following table shows the pin definition of USB interface. Table 13: USB Pin Description Pin Name Pin No. I/O Description Comment USB_DP IO USB differential data bus (positive). Require differential impedance of 90Ω. USB_DM 10 IO USB differential data bus (minus). Require differential impedance of 90Ω. USB_VBUS PI Used for detecting the USB interface connected. 2.5~5.25V. Typical 5.0V. More details about the USB 2.0 specifications, please visit http://www.usb.org/home. The following figure shows the reference circuit of USB interface. Module Close to USB connector USB connector USB_VBUS USB_VBUS NM_2pF USB_DM USB_DP Rs USB_DM Rs USB_DP ESD Differential layout NM NM GND GND Figure 25: Reference Circuit of USB Application In order to ensure the USB interface design corresponding with the USB 2.0 specification, please comply with the following principles: It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90ohm. Pay attention to the influence of junction capacitance of ESD component on USB data lines. Typically, the capacitance value should be less than 2pF. Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB differential traces in inner-layer with ground shielding not only upper and lower layer but also right and left side. UG96_Hardware_Design Confidential / Released 43 / 75 UMTS/HSPA Module Series UG96 Hardware Design Keep the ESD components as close as possible to the USB connector. It is suggested that reserve RC circuit near USB connector for debug. The USB interface is recommended to be reserved for firmware upgrade in your design. The following figure shows the recommended test points. Module USB_VBUS Connector USB_VBUS USB_DM USB_DM USB_DP USB_DP VBAT_BB VBAT VBAT_RF PWRKEY GND PWRKEY GND Figure 26: Test Points of Firmware Upgrade NOTES 1. UG96 module can only be used as a slave device. 2. It is suggested that you should set USB_DP, USB_DM and USB_VBUS pins as test points and then place these test points on the DTE for debug. 3. USB interface supports software debug and firmware upgrade by default. 3.13. PCM and I2C Interface UG96 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following features: Supports 8, 16, 32 bit mode with short frame synchronization, the PCM support 8 bit mode by default. The PCM codec default configuration is AT+QDAC=1. Refer to document [1] for more details. Supports master mode. Supports audio sample rate 8 kHz. UG96_Hardware_Design Confidential / Released 44 / 75 UMTS/HSPA Module Series UG96 Hardware Design The following table shows the pin definition of PCM and I2C interface. Table 14: Pin Definition of PCM and I2C Interface Pin Name Pin No. I/O Description Comment PCM_CLK DO PCM data bit clock 1.8V power domain PCM_SYNC DO PCM data frame sync signal 1.8V power domain PCM_IN DI PCM data input 1.8V power domain PCM_OUT DO PCM data output 1.8V power domain I2C_SCL 40 OD I2C serial clock Require external pull-up resistor. I2C_SDA 41 OD I2C serial data Require external pull-up resistor. Clock output Provide a digital clock output for an external audio codec. If unused, keep this pin open. CLK_OUT 25 DO In PCM audio format the MSB of the channel included in the frame (PCM_SYNC) is clocked on the second CLK falling edge after the PCM_SYNC pulse rising edge. The period of the PCM_SYNC signal (frame) lasts for Data word bit +1 clock pulses. UG96’s firmware has integrated the configurations on NAU8814 /ALC5616/MAX9860 application with I2C interface. AT+ADQC command is used to configure the external codec chip linked with PCM interface, and refer to document [1] for more details. Data bit is 32 bit and the sampling rate is 8 KHz. The following figure shows the timing of the application with ALC5616 codec. Sampling freq. = 8 KHz PCM_SYNC PCM_CLK BCLK = 264 KHz 33 PCM_IN/OUT 32 31 MSB 32-bit data word Figure 27: PCM Master Mode Timing UG96_Hardware_Design Confidential / Released 45 / 75 UMTS/HSPA Module Series UG96 Hardware Design In general, the BitClockFrequency (BCLK) is calculated by the following expression: BitClockFrequency=(DataWordBit +1) × SamplingFrequency The following figure shows the reference design of PCM interface with external codec IC. PCM_CLK MIC+ MIC- BCLK PCM_SYNC LRCLK PCM_OUT DACDAT PCM_IN ADCDAT Rs CLK_OUT MCLK I2C_SDA SDA Module 1K SCL 1K I2C_SCL NM BIAS MICBIAS SPK+ SPK- CODEC VDD_EXT Figure 28: Reference Circuit of PCM Application with Audio Codec NOTES 1. It is recommended to reserve RC (e.g. R=22Ω, C=22pF) circuit on the PCM lines, especially for PCM_CLK. 2. UG96 module provides a digital clock output (CLK_OUT) for an external audio codec, the CLK_OUT function is disabled by default. When CLK_OUT is required, AT command is used to provide the codec with a 13/26MHz clock generated from the module. Refer to document [1] for details. If unused, keep this pin open. 3. A RC (e.g. R=22Ω, C=47pF) circuit is recommended to be reserved on CLK_OUT line. If external audio CODEC is MAX9860 or NAU8814, the RC circuit should be mounted, if it is ALC5616, then it is not mounted. UG96_Hardware_Design Confidential / Released 46 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.14. Network Status Indication The NETLIGHT signal can be used to drive a network status indication LED. The following tables describe pin definition and logic level changes in different network status. Table 15: Pin Definition of Network Indicator Pin Name Pin No. I/O Description Comment NETLIGHT 21 Indicate the module network activity status. 1.8V power domain. DO Table 16: Working State of the Network Indicator Pin Name NETLIGHT Status Description PWM (200ms High/1800ms Low) Network searching PWM (1800ms High/200ms Low) Idle&Data transfer Always High Voice&CSD calling A reference circuit is shown in the following figure. VBAT Module 2.2K NETLIGHT 4.7K 47K Figure 29: Reference Circuit of the NETLIGHT UG96_Hardware_Design Confidential / Released 47 / 75 UMTS/HSPA Module Series UG96 Hardware Design 3.15. Operating Status Indication The STATUS pin is set as the module status indicator. It will output high level when module is powered on. The following table describes pin definition of STATUS. Table 17: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the module operation status. 1.8V power domain A reference circuit is shown as below. VBAT Module 2.2K 4.7K STATUS 47K Figure 30: Reference Circuit of the STATUS UG96_Hardware_Design Confidential / Released 48 / 75 UMTS/HSPA Module Series UG96 Hardware Design Antenna Interface The Pin 60 is the RF antenna pad. The RF interface has an impedance of 50Ω. 4.1. GSM/UMTS Antenna Interface .1.1. Pin Definition Table 18: Pin Definition of the RF Antenna Pin Name Pin No. GND 58 ground GND 59 ground RF_ANT 60 GND 61 ground GND 62 ground .1.2. I/O IO Description RF antenna pad Comment 50Ω impedance Operating Frequency Table 19: The Module Operating Frequencies Band Receive Transmit Unit GSM850 869 ~ 894 824 ~ 849 MHz EGSM900 925 ~ 960 880 ~ 915 MHz DCS1800 1805 ~ 1880 1710 ~ 1785 MHz PCS1900 1930 ~ 1990 1850 ~ 1910 MHz UMTS2100 2110 ~ 2170 1920 ~ 1980 MHz UMTS1900 1930 ~ 1990 1850 ~ 1910 MHz UG96_Hardware_Design Confidential / Released 49 / 75 .1.3. UMTS/HSPA Module Series UG96 Hardware Design UMTS900 925 ~ 960 880 ~ 915 MHz UMTS850 869 ~ 894 824 ~ 849 MHz UMTS800 875 ~ 885 830 ~ 840 MHz Reference Design The RF external circuit is recommended as below. It should reserve a π-type matching circuit for better RF performance. The capacitors are not mounted by default. Module R1 0R RF_ANT C1 NM C2 NM Figure 31: Reference Circuit of Antenna Interface UG96 provides an RF antenna PAD for customer’s antenna connection. The RF trace in host PCB connected to the module RF antenna pad should be micro-strip line or other types of RF trace, whose characteristic impendence should be close to 50Ω. UG96 comes with grounding pads which are next to the antenna pad in order to give a better grounding. UG96_Hardware_Design Confidential / Released 50 / 75 .2.1. .2.2. UMTS/HSPA Module Series UG96 Hardware Design 4.2. Antenna Installation Antenna Requirement The following table shows the requirement on GSM/UMTS antenna. Table 20: Antenna Cable Requirements Type Requirements GSM850/EGSM900 UMTS800/850/900 Cable insertion loss <1dB DCS1800/PCS1900 UMTS1900/2100 Cable insertion loss <1.5dB Table 21: Antenna Requirements Type Requirements Frequency Range GSM 4-band: 850/900/1800/1900MHz UMTS 5-band: 800/850/900/1900/2100MHz VSWR <2:1 recommended, <3:1 acceptable Gain (dBi) 1 typical Max Input Power (W) 50 Input Impedance (Ω) 50 Polarization Type Vertical Install the Antenna with RF Connector The following figure is the antenna installation with RF connector provided by HIROSE. The recommended RF connector is UF.L-R-SMT. UG96_Hardware_Design Confidential / Released 51 / 75 UMTS/HSPA Module Series UG96 Hardware Design Figure 32: Dimensions of the UF.L-R-SMT Connector (Unit: mm) You can use U.FL-LP serial connector listed in the following figure to match the UF.L-R-SMT. Figure 33: Mechanicals of UF.L-LP Connectors (Unit: mm) UG96_Hardware_Design Confidential / Released 52 / 75 UMTS/HSPA Module Series UG96 Hardware Design The following figure describes the space factor of mated connector Figure 34: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com. UG96_Hardware_Design Confidential / Released 53 / 75 UMTS/HSPA Module Series UG96 Hardware Design Electrical, Reliability and Radio Characteristics 5.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table. Table 22: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 USB_VBUS -0.3 5.5 Peak Current of VBAT_BB 0.8 Peak Current of VBAT_RF Voltage at Digital Pins -0.3 2.3 5.2. Power Supply Ratings Table 23: The Module Power Supply Ratings Parameter VBAT Description Conditions Min. Typ. Max. Unit VBAT_BB and VBAT_RF Voltage must stay within the min/max values, including voltage drop, ripple, and spikes. 3.3 3.8 4.3 Voltage drop during transmitting burst Maximum power control level on EGSM900. 400 mV UG96_Hardware_Design Confidential / Released 54 / 75 UMTS/HSPA Module Series UG96 Hardware Design Parameter Description Conditions Min. IVBAT Peak supply current (during transmission slot) Maximum power control level on EGSM900. USB_VBUS USB insert detection 2.5 Typ. Max. Unit 1.8 2.0 5.0 5.25 5.3. Operating Temperature The operating temperature is listed in the following table. Table 24: Operating Temperature Parameter Min. Typ. Max. Unit Normal Temperature -35 25 80 ºC Restricted Operation1) -40~ -35 80 ~ 85 ºC Storage Temperature -45 90 ºC NOTE 1) When the module works within the temperature range, the deviations from the RF specification may occur. For example, the frequency error or the phase error would increase. 5.4. Current Consumption The values of current consumption are shown below. Table 25: The Module Current Consumption Parameter Description Conditions IVBAT OFF state supply current Power down UG96_Hardware_Design Confidential / Released Min. Typ. 126 Max. Unit uA 55 / 75 UMTS/HSPA Module Series UG96 Hardware Design Parameter Description GSM/GPRS supply current WCDMA supply current GPRS data transfer UG96_Hardware_Design Conditions Min. Typ. Max. Unit Sleep (USB disconnected) @DRX=2 1.13 mA Sleep (USB disconnected) @DRX=5 1.10 mA Sleep (USB disconnected) @DRX=9 1.00 mA Sleep (USB disconnected) @DRX=6 2.52 mA Sleep (USB disconnected) @DRX=7 1.82 mA Sleep (USB disconnected) @DRX=8 1.75 mA Sleep (USB disconnected) @DRX=9 1.76 mA Idle (USB disconnected) @DRX=6 12.4 mA Idle (USB connected) @DRX=6 32.1 mA GSM850 1DL/1UL PCL=5 263 mA GSM850 4DL/1UL PCL=5 266 mA GSM850 3DL/2UL PCL=5 455 mA GSM850 2DL/3UL PCL=5 562 mA GSM850 1DL/4UL PCL=5 601 mA EGSM900 1DL/1UL PCL=5 267 mA EGSM900 4DL/1UL PCL=5 264 mA EGSM900 3DL/2UL PCL=5 450 mA EGSM900 2DL/3UL PCL=5 570 mA EGSM900 1DL/4UL PCL=5 610 mA DCS1800 1DL/1UL PCL=0 175 mA DCS1800 4DL/1UL PCL=0 193 mA DCS1800 3DL/2UL PCL=0 308 mA DCS1800 2DL/3UL PCL=0 373 mA Confidential / Released 56 / 75 UMTS/HSPA Module Series UG96 Hardware Design Parameter Description EDGE data transfer UG96_Hardware_Design Conditions Min. Typ. Max. Unit DCS1800 1DL/4UL PCL=0 397 mA PCS1900 1DL/1UL PCL=0 189 mA PCS1900 4DL/1UL PCL=0 204 mA PCS1900 3DL/2UL PCL=0 330 mA PCS1900 2DL/3UL PCL=0 407 mA PCS1900 1DL/4UL PCL=0 434 mA GSM850 1DL/1UL PCL=8 187 mA GSM850 4DL/1UL PCL=8 199 mA GSM850 3DL/2UL PCL=8 312 mA GSM850 2DL/3UL PCL=8 412 mA GSM850 1DL/4UL PCL=8 504 mA EGSM900 1DL/1UL PCL=8 184 mA EGSM900 4DL/1UL PCL=8 197 mA EGSM900 3DL/2UL PCL=8 305 mA EGSM900 2DL/3UL PCL=8 406 mA EGSM900 1DL/4UL PCL=8 500 mA DCS1800 1DL/1UL PCL=2 197 mA DCS1800 4DL/1UL PCL=2 205 mA DCS1800 3DL/2UL PCL=2 309 mA DCS1800 2DL/3UL PCL=2 400 mA DCS1800 1DL/4UL PCL=2 482 mA PCS1900 1DL/1UL PCL=2 200 mA PCS1900 4DL/1UL PCL=2 201 mA PCS1900 3DL/2UL PCL=2 310 mA Confidential / Released 57 / 75 UMTS/HSPA Module Series UG96 Hardware Design Parameter Description WCDMA data transfer Conditions Min. Typ. Max. Unit PCS1900 2DL/3UL PCL=2 403 mA PCS1900 1DL/4UL PCL=2 487 mA UMTS2100 HSDPA @max power 560 mA UMTS2100 HSUPA @max power 480 mA UMTS1900 HSDPA @max power 581 mA UMTS1900 HSUPA @max power 542 mA UMTS900 HSDPA @max power 562 mA UMTS900 HSUPA @max power 421 mA UMTS850/800 HSDPA @max power 517 mA UMTS850/800 HSUPA @max power 478 mA GSM850 @PCL=5 238 mA EGSM900 @PCL=5 242 mA DCS1800 @PCL=0 164 mA PCS1900 @PCL=0 176 mA UMTS2100 @max power 451 mA UMTS1900 @max power 511 mA UMTS900 @max power 429 mA UMTS850/800 @max power 448 mA GSM voice call WCDMA voice call UG96_Hardware_Design Confidential / Released 58 / 75 UMTS/HSPA Module Series UG96 Hardware Design 5.5. RF Output Power The following table shows the RF output power of UG96 module. Table 26: Conducted RF Output Power Edge Frequency Max. Min. GSM850 32.5dBm±1dB 5dBm±5dB EGSM900 32.5dBm±1dB 5dBm±5dB DCS1800 29.5dBm±1dB 0dBm±5dB PCS1900 29.5dBm±1dB 0dBm±5dB GSM850 (8-PSK) 27dBm±1dB 5dBm±5dB EGSM900 (8-PSK) 27dBm±1dB 5dBm±5dB DCS1800 (8-PSK) 26dBm±1dB 0dBm±5dB PCS1900 (8-PSK) 26dBm±1dB 0dBm±5dB UMTS2100 22dBm±1dB <-50dBm UMTS1900 22dBm±1dB <-50dBm UMTS900 22dBm±1dB <-50dBm UMTS850/800 22dBm±1dB <-50dBm NOTE In GPRS 4 slots TX mode, the max output power is reduced by 3dB. This design conforms to the GSM specification as described in chapter 13.16 of 3GPP TS 51.010-1. UG96_Hardware_Design Confidential / Released 59 / 75 UMTS/HSPA Module Series UG96 Hardware Design 5.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of UG96 module. Table 27: Conducted RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) GSM850 -109.6dBm EGSM900 -108.5dBm DCS1800 -110dBm PCS1900 -108dBm UMTS850/800 -110dBm UMTS900 -110dBm UMTS1900 -109.5dBm UMTS2100 -110.5dBm 5.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. UG96_Hardware_Design Confidential / Released 60 / 75 UMTS/HSPA Module Series UG96 Hardware Design Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 6.1. Mechanical Dimensions of the Module 2.2+/-0.2 22.5+/-0.15 26.5+/-0.15 0.8+/-0.1 Figure 35: UG96 Top and Side Dimensions UG96_Hardware_Design Confidential / Released 61 / 75 UMTS/HSPA Module Series UG96 Hardware Design 22.50 2.075 1.70 26.50 0.85 1.10 0.70 1.00 1.70 2.225 1.00 1.70 1.15 0.55 62x0.7 40x1.00 40x1.00 62x1.15 Figure 36: UG96 Bottom Dimension (Top View) UG96_Hardware_Design Confidential / Released 62 / 75 UMTS/HSPA Module Series UG96 Hardware Design 6.2. Footprint of Recommendation 22.50 9.95 7.45 9.95 7.15 1.95 0.55 1.10 11.80 9.70 7.65 5.95 4.25 0.20 2.55 0.85 0.85 26.50 2.55 4.25 1.90 5.95 2.55 7.65 2.55 9.60 11.80 0.85 0.85 4.25 4.25 5.95 5.95 62x0.7 62x2.35 40x1.00 1.00 40x1.00 Figure 37: Recommended Footprint (Top View) UG96_Hardware_Design Confidential / Released 63 / 75 UMTS/HSPA Module Series UG96 Hardware Design The recommended stencil of UG96 is shown as below figure. Figure 38: Recommended Stencil of UG96 (Top View) NOTES 1. In order to maintain the module, keep about 3mm between the module and other components in the host PCB. 2. All RESERVED pins must not be connected to GND. 3. All dimensions are in millimeters. UG96_Hardware_Design Confidential / Released 64 / 75 UMTS/HSPA Module Series UG96 Hardware Design 6.3. Top View of the Module Figure 39: Top View of the Module 6.4. Bottom View of the Module Figure 40: Bottom View of the Module UG96_Hardware_Design Confidential / Released 65 / 75 UMTS/HSPA Module Series UG96 Hardware Design Storage and Manufacturing 7.1. Storage UG96 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag is 12 months at < 40ºC/90%RH. After this bag is opened, devices that will be subjected to reflow solder or other high temperature process must be: Mounted within 72 hours at factory conditions of ≤ 30ºC/60%RH. Stored at <10% RH. Devices require bake, before mounting, if: Humidity indicator card is >10% when read 23ºC±5ºC. Mounted for more than 72 hours at factory conditions of ≤ 30ºC/60% RH. If baking is required, devices may be baked for 48 hours at 125ºC±5ºC. NOTE As plastic container cannot be subjected to high temperature, module needs to be taken out from container to high temperature (125ºC) bake. If shorter bake times are desired, please refer to IPC/JEDECJ-STD-033 for bake procedure. 7.2. Manufacturing and Welding The squeegee should push the paste on the surface of the stencil that makes the paste fill the stencil openings and penetrate to the PCB. The force on the squeegee should be adjusted so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil at the hole of the module pads should be 0.13mm. For details, please refer to document [6]. UG96_Hardware_Design Confidential / Released 66 / 75 UMTS/HSPA Module Series UG96 Hardware Design It is suggested that peak reflow temperature is 235 ~ 245ºC (for SnAg3.0Cu0.5 alloy). Absolute max reflow temperature is 260ºC. To avoid damage to the module when it was repeatedly heated, it is suggested that the module should be mounted after the first panel has been reflowed. The following picture is the actual diagram which we have operated. ºC Preheat Heating Cooling 250 Liquids Temperature 217 200 ºC 200 40s~60s 160 ºC 150 70s~120s 100 Between 1~3 ºC/s 50 50 100 150 200 250 300 Time Figure 41: Reflow Soldering Profile UG96_Hardware_Design Confidential / Released 67 / 75 UMTS/HSPA Module Series UG96 Hardware Design 7.3. Packaging The modules are stored inside a vacuum-sealed bag which is ESD protected. It should not be opened until the devices are ready to be soldered onto the application. The reel is 330mm in diameter and each reel contains 250 modules. Figure 42: Tape and Reel Specification UG96_Hardware_Design Confidential / Released 68 / 75 UMTS/HSPA Module Series UG96 Hardware Design Figure 43: Dimensions of Reel Table 28: Reel Packing Model Name UG96 MOQ for MP Minimum Package: 250pcs Minimum Package×4=1000pcs 250pcs Size: 370 × 350 × 56mm3 N.W: 0.78kg G.W: 1.46kg Size: 380 × 250 × 365mm3 N.W: 3.1kg G.W: 6.45kg UG96_Hardware_Design Confidential / Released 69 / 75 UMTS/HSPA Module Series UG96 Hardware Design Appendix A Reference Table 29: Related Documents SN Document Name Remark [1] Quectel_WCDMA_UGxx_AT_Commands_Manual UGxx AT Commands Manual [2] Quectel_UMTS<E_EVB_User_Guide UMTS<E EVB User Guide [3] Quectel_UG96_Reference_Design UG96 Reference Design [4] Quectel_UG96&UG95&M95 R2.0_Reference_Design UG96, UG95 and M95 R2.0 Compatible Reference Design [5] Quectel_UG96&UG95&M95 R2.0_Compatible_ Design UG96, UG95 and M95 R2.0 Compatibility Design Specification [6] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 30: Terms and Abbreviations Abbreviation Description AMR Adaptive Multi-rate ARP Antenna Reference Point bps Bits Per Second CHAP Challenge Handshake Authentication Protocol CS Coding Scheme CSD Circuit Switched Data CTS Clear To Send DRX Discontinuous Reception DCE Data Communications Equipment (typically module) DTE Data Terminal Equipment (typically computer, external controller) UG96_Hardware_Design Confidential / Released 70 / 75 UMTS/HSPA Module Series UG96 Hardware Design DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate EGSM Extended GSM900 band (includes standard GSM900 band) ESD Electrostatic Discharge FR Full Rate GMSK Gaussian Minimum Shift Keying GPS Global Positioning System GSM Global System for Mobile Communications HR Half Rate HSPA High Speed Packet Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access I/O Input/Output IMEI International Mobile Equipment Identity Imax Maximum Load Current Inorm Normal Current LED Light Emitting Diode LNA Low Noise Amplifier Mbps Mbits per second MO Mobile Originated MS Mobile Station (GSM engine) MT Mobile Terminated PAP Password Authentication Protocol PBCCH Packet Broadcast Control Channel UG96_Hardware_Design Confidential / Released 71 / 75 UMTS/HSPA Module Series UG96 Hardware Design PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol PSK Phase Shift Keying PWM Pulse Width Modulation QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized RMS Root Mean Square (value) RTC Real Time Clock Rx Receive SIM Subscriber Identification Module SMS Short Message Service TDMA Time Division Multiple Access TE Terminal Equipment TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code USIM Universal Subscriber Identity Module USSD Unstructured Supplementary Service Data Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value UG96_Hardware_Design Confidential / Released 72 / 75 UMTS/HSPA Module Series UG96 Hardware Design VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access UG96_Hardware_Design Confidential / Released 73 / 75 UMTS/HSPA Module Series UG96 Hardware Design Appendix B GPRS Coding Scheme Table 31: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 C4-4 Code Rate 1/2 2/3 3/4 USF Pre-coded USF 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail Coded Bits 456 588 676 456 Punctured Bits 132 220 Data Rate Kb/s 9.05 13.4 15.6 21.4 UG96_Hardware_Design Confidential / Released 74 / 75 UMTS/HSPA Module Series UG96 Hardware Design 10 Appendix C GPRS Multi-slot Class Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in the following table. Table 32: GPRS Multi-slot Classes Multislot Class Downlink Slots Uplink Slots Active Slots 10 11 12 UG96_Hardware_Design Confidential / Released 75 / 75 UMTS/HSPA Module Series UG96 Hardware Design 11 Appendix D EDGE Modulation and Coding Scheme Table 33: EDGE Modulation and Coding Scheme Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK 14.8kbps 29.6kbps 59.2kbps MCS-4 GMSK 17.6kbps 35.2kbps 70.4kbps MCS-5 8-PSK 22.4kbps 44.8kbps 89.6kbps MCS-6 8-PSK 29.6kbps 59.2kbps 118.4kbps MCS-7 8-PSK 44.8kbps 89.6kbps 179.2kbps MCS-8 8-PSK 54.4kbps 108.8kbps 217.6kbps MCS-9 8-PSK 59.2kbps 118.4kbps 236.8kbps UG96_Hardware_Design Confidential / Released 76 / 75
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