ST Microelectronics S R L ZB32C2 ZigBee Module User Manual

ST Microelectronics S.R.L. ZigBee Module

User manual

SPZB32W1A2.1 / SPZB32W1C2.1 IEEE 802.15.4 Module Tentative FEATURES • Integrated 2.4GHz , IEEE 802.15.4-compliant transceiver • 3 dBm nominal TX output power • -99 dBm RX sensitivity • RX filtering for co-existence with IEEE 802.11g and Bluetooth devices • Integrated VCO and loop filter • Integrated IEEE 802.15.4 PHY and MAC • 128kB Embedded flash and 8kB integrated RAM for program and data storage • 22 GPIO with alternate functions: • GPIOs • UART • I2C • SPI • ADC • 2 16-bit general purpose timers; one 16-bit sleep timer • ADC , sigma-delta converter with 12 bit resolution • On board 24 MHz stable Xtal • Selectable Integrated RC oscillator ( typ 10KHz) or 32.768kHz Xtal for low power operation • 0.8 uA typ power consumption in Deep sleep mode • Watchdog timer and power on reset • Pins available for Non-intrusive debug interface (SIF) • Integrated Antenna (SPZB32W1A2.1) or integrated RF UFL connector for external antenna (SPZB32W1C2.1) • Single voltage supply • FCC and CE compliant • Small Form Factor : 16.4 x 26.5 mm APPLICATIONS • Industrial controls • Sensor Networking • Monitoring of remote systems • Home/Building Automation • Security systems • Lighting controls DESCRIPTION SPZB32W1A2.1 / SPZB32W1C2.1 are ready-to-use ZigBee ® modules optimized for embedded applications requiring short range performances. These high-performance, very compact modules enable OEMs to easily add short range reach wireless capability to electronic devices by optimizing time-to-market, cost and size of their target applications. The modules are based on STM32W single chip ZigBee® solution which integrates a 2.4GHz, IEEE 802.15.4-compliant transceiver together with an embedded processor. 24 MHz high stability Xtal is available aboard the modules to perform the timing requirements as per ZigBee ® specifications; additionally a 32.768kHz Xtal is provided for low power operation. A single supply voltage is requested to power the modules. An innovative 2.5 GHz RF design and the relevant internal RF Amplifier aboard ensure the optimal exploitation of the link budget, an excellent sensitivity and still low power consumption for battery powered operation. The voltage supply also determines the I/O ports level allowing an easy interface with additional peripherals. A 128kB of embedded flash memory and 8kB of RAM are available for data and program storage. To support user defined applications, a number of peripherals such as GPIO,UART,I2C, ADC and general purpose timers are available and user selectable. Modules are available with two different antenna options: • SPZB32W1A2.1 with integrated ceramic antenna aboard • SPZB32W1C2.1 with UFL RF connector for the connection of an external antenna. (for details on STM32W refer to the related Datasheet )
SPZB32W1A2.1 / SPZB32W1C2.1 2/12 Contents 1 Block diagram ……………………………………………………………………………. 3 2 Pin Configuration …………………………………………………………………………3 3 Electrical Characteristics ………………………………………………………………. 4 3.1 Absolute Maximum Ratings …………………………………………………………… 4 3.2 Recommended Operating Conditions ……..…………………………………………… 4 3.3 DC Electrical characteristics …………………………………………………………… 4 3.4 Digital I/O Specifications …………………………………………………………….. 4 3.5 RF Electrical characteristics …………………………………………………………… 4 4 Pins Description …………………………………………………………………………5 5 Mechanical Dimensions ………………………………………………………………….. 8 6 Soldering ………………………………………………………………………………….. 9 7 Appendix A - FCC Statement ..……………………………………………………… 10
SPZB32W1A2.1 / SPZB32W1C2.1 3/12 1-BLOCK DIAGRAM 2-PIN CONFIGURATION 24 MHz XtalSTM32W Tranceiver Vdd SIF GPIO CONTR SIGN RF antenna 32.768 kHzXtal balun BPF Figure 1. SPZB32W1A2.1 Block diagram Figure3. Pin configuration 24 MHz XtalSTM32W Tranceiver Vdd SIF GPIOCONTR SIGN RF antenna 32.768 kHzXtal balun BPF Figure 2. SPZB32W1C2.1 Block diagram
SPZB32W1A2.1 / SPZB32W1C2.1 4/12 3 – ELECTRICAL CHARACTERISTICS 3.1 - ABSOLUTE MAXIMUM RATINGS Table 1. Absolute maximum ratings Symbol Parameter Min Max Unit VDD Module supply voltage - 0.3 3.6 V Vin Input voltage on any digital pin - 0.3 Vdd + 0.3 V Tstg Storage tempeature -40 +85 °C Tsold. Soldering temperature < 10s 250 °C 3.2 - RECOMMENDED OPERATING CONDITIONS Table 2. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VDD Module supply voltage -40°C < T < +85 C 2.8 3.3 3.6 V Tstg Operating ambient temperature -40 +85 °C 3.3 - DC ELECTRICAL CHARACTERISTICS Table3. DC Electrical Characteristics Symbol Parameter Conditions Min Typ Max Unit IRX RX current Vdd = 3.3 V T= 25 °C 28 mA ITX TX current Po = 3 dBm Vdd = 3.3 V T= 25 °C F=2450 Mhz 32 mA IDS Deep Sleep Current (32.768kHz oscillator) Vdd = 3.3 V T = 25°C 1.3 µΑ 3.4 - DIGITAL I/O SPECIFICATIONS Table 4. Digital I/O Specifications Symbol Parameter Conditions Min Typ Max Unit VIL Low Level Input Voltage 2.8 < Vdd < 3.6 V 0 0.5 x Vdd V VIH High level input voltage 2.8 < Vdd < 3.6 V 0.62 x Vdd Vdd V Iil Input current for logic 0 2.8 < Vdd < 3.6 V -0.5 µΑIih Input current for logic 1 2.8 < Vdd < 3.6 V 0.5 µΑRipu Input pull-up resistor 30 κΩRipd Input pull-down resistor 30 κΩ VOL Low level output voltage 0 0.18 x Vdd V VOH High level output voltage 0.82 x Vdd Vdd V IOHS Output source current (standard ) 4 mA IOLS Output sink current (standard) 4 mA IOHH Output source current (high current) 8 mA IOLH Output sink current (high current) 8 mA IOTot Total output current for I/O 40 mA 3.5 - RF ELECTRICAL CHARACTERISTICS Table 5. RF Electrical Characteristics Symbol Parameter Conditions Min Typ Max Unit Frequency range Vdd = 3.3 V T= 25 °C 2405 2480 MHz TX Output power Vdd = 3.3 V T= 25 °C 3 6 dBm RX Sensitivity Vdd = 3.3V 1% PER -95 - 97 dBm CFE Carrier frequency error Vd d= 3.3V -40 / + 85 °C - t.b.d. t.b.d. ppm Adjacent channel rejection +/- 5 MHz +/- 10 MHZ 35 40 dBm
SPZB32W1A2.1 / SPZB32W1C2.1 5/12 4 – PIN DESCRIPTION Table 6. Pin Description Module Pin Number PIN Name Direction STM32W pin Description 1 PB5 I/O 43 Digital I/O ADC0 Analog 43 ADC Input 0 TIM2CLK I 43 Timer 2 external clock input TIM1MSK I 43 Timer 1 external clock mask input 2 PA5 I/O 27 Digital I/O ADC5 Analog 27 ADC Input 1 PTI_DATA O 27 Frame signal of PTI (Packet Trace Interface) nBOOTMODE I 27 Embedded serial bootloader activation out of reset TRACEDATA3 0 27 Synchrounus CPU trace data bit 3 3 PA4 I/O 26 Digital I/O ADC4 Analog 26 ADC Input 0 PTI_EN O 26 Frame signal of PTI (Packet Trace Interface) TRACEDATA2 O 26 Synchrounus CPU trace data bit 2 4 PA3 I/O 25 Digital I/O SC2nSSEL I 25 SPI SLAVE SELECT of Serial Controller 2 TIM2_CH2 I/O 25 Timer 2 channel 2 output (or input - Disable remap with TIM2_OR[5]) TRACECLK O 25 Synchrounus CPU trace clock 5 nRESET I 12 Active low reset ( an internal pull-up of 30 kohm typ. is provided) 6 PB3 I/O 19 Digital I/O UART_CTS I 19 UART CTS handshake of Serial Controller 1 SC1SCLK I/O 19 SPI slaver clock of Serial Controller SC1 / SPI master clock of Serial Controller SC1 TIM2_CH3 I/O 19 Timer 2 channel 3 input / Timer 2 channel 3 output 7 PB4 I/O 20 Digital I/O UART_RTS O 20 UART RTS handshake of Serial Controller 1 TIM2_CH4 I/O 20 Timer 2 channel 4 input / Timer 2 channel 4 output SC1nSSEL I 20 SPI slave select of Serial Controller 1 8 PA0 I/O 21 Digital I/O SC2MOSI O 21 SPI Master data out of Serial Controller 2 SC2MOSI I 21 SPI Slave data in of Serial Controller 2 TIM2_CH1 I/O 21 Timer 2 channel 1 input / Timer 2 channel 1 output 9 PA1 I/O 22 Digital I/O SC2MISO I 22 SPI Master data in of Serial Controller 2 SC2MISO O 22 SPI Slave data out of Serial Controller 2 SC2SDA I/O 22 TWI (I2C) data of Serial Controller 2 TIM2_CH3 I/O 22 Timer 2 channel 3 input / Timer 2 channel 3 output 10 PA2 I/O 24 Digital I/O SC2SCLK O 24 SPI Master clock of Serial Controller 2 SC2SCLK I 24 SPI Slave clock of Serial Controller 2 SC2SCL I/O 24 TWI (I2C) clock of Serial Controller 2
SPZB32W1A2.1 / SPZB32W1C2.1 6/12 TIM2_CH4 I/O 24 Timer 2 channel 4 input / Timer 2 channel 4 output 11 GND -- 49 Ground 12 VDD Power 16,23,28,37 Input power supply 13 PC1 I/O 38 Digital I/O ADC3 Analog 38 ADC Input 3 SWO O 38 Serial Wire Output ayncronous trace output to debugger TRACEDATA0 O 38 Syncronous CPU trace data bit 0 14 PB0 I/O 36 Digital I/O VREF (O/I) Analog 36 ADC reference output / ADC reference input TIM1CLK I 36 Timer 1 external clock input TIM2MSK I 36 Timer 2 external clock mask input IRQA I 36 External interrupt source A TRACECLK O 36 Syncronous CPU trace clock 15 PB1 I/O 30 Digital I/O SC1TXD O 30 UART transmit data of Serial Controller 1 SC1MOSI / SC1MISO O 30 SPI master data out of Serial Controller 1 / SPI slave data out of Serial Controller 1 SC1SDA I/O 30 TWI (I2C) data of Serial Controller 1 TIM2_CH1 I/O 30 Timer 2 channel 1 input / Timer 2 channel 1 output 16 PB2 I/O 31 Digital I/O SC1RXD I 31 UART receive data of Serial Controller 1 SC1MISO / SC1MOSI I 31 SPI master data in of Serial Controller SC1 / SPI slave data in of Serial Controller 1 SC1SCL I/O 31 TWI (I2C) clock of Serial Controller 1 TIM2_CH2 I/O 31 Timer 2 channel 2 input / Timer 2 channel 2 output 17 JTCK I 32 JTAG clock input from debugger SWCLK I/O 32 Serial Wire clock input/output with debugger 18 PC2 I/O 33 Digital I/O JTDO O 33 JTAG data out to debugger SWO O 33 Serial Wire Output asyncronous trace output to debugger 19 PC3 I/O 34 Digital I/O JTDI I 34 JTAG data in from debugger 20 PC4 I/O 35 Digital I/O JTMS I 35 JTAG mode select from debugger SWDIO I/O 35 Serial Wire bidirectional data to/from debugger 21 PC0 I/O 40 Digital I/O (high current) JRST I 40 JTAG reset input from debugger TRACEDATA1 O 40 Syncronous CPU trace data bit 1 IRQD I 40 External interrupt source D 22 PB7 I/O 41 Digital I/O TIM1_CH2 O 41 Timer 1 channel 2 output TIM1 _CH2 I 41 Timer 1 channel 2 input IRQC I 41 External interrupt source C ADC2 I 41 ADC input 2 23 PB6 I/O 42 Digital I/O
SPZB32W1A2.1 / SPZB32W1C2.1 7/12 TIM1_CH1 O 42 Timer 1 channel 1 output TIM1_CH1 I 42 Timer 1 channel 1 input IRQB I 42 External interrupt source B ADC1 Analog 42 ADC input 1 24 PA6 I/O 29 Digital I/O TIM1_CH3 O 29 Timer 1 channel 3 output TIM1_CH3 I 29 Timer 1 channel 3 input 25 PA7 I/O 18 Digital I/O TIM1_CH4 O 18 Timer 1 channel 4 output TIM1_CH4 I 18 Timer 1 channel 4 input REG_EN O 18 External regulator open drain output (enabled after reset) 26 PC5 I/O 11 Digital I/O TX_ACTIVE O 11 Logic level control for external Rx/Tx switch
SPZB32W1A2.1 / SPZB32W1C2.1 8/12 5 - MECHANICAL DIMENSIONS Figure 4 Mechanical dimensions Figure 5 Pin land pattern
SPZB32W1A2.1 / SPZB32W1C2.1 9/12 6 - SOLDERING Soldering phase has to be carefully executed: in order to avoid undesired melting phenomenon, particular attention has to be taken on the set up of the Peak Temperature. Here following some suggestions for the temperature profile based on IPC/JEDEC J-STD-020C, July 2004 recommendations Profile feature PB free assembly Average ramp up rate ( TSMAX to TP) 3°C / sec max Preheat Temperature min ( TS MIN) Temperature max ( TS MAX) Time (TS MIN to TS MAX) ( tS ) 150 ° C 200 ° C 60 – 100 sec Time maintained above : Temperature TL Time tL 217 ° C 40 – 70 sec Peak Temperature (Tp) 240 + 0 ° C Time within 5°C of actual peak temperature (tP) 10 – 20 sec Ramp down rate 6 °C / sec Time from 25° C to peak temperature 8 minutes max
SPZB32W1A2.1 / SPZB32W1C2.1 10/12 Appendix A - FCC Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: − Reorient or relocate the receiving antenna − Increase the separation between the equipment and receiver − Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio/TV technician for help Antenna Our module type SPZB32W1x2.1 is for OEM integrations only. The end-user product will be professionally installed in such a manner that only the authorized antennas are used. Caution Any changes or modifications not expressed approved by the part responsible for compliance could cause the module to cease to comply with FCC rules part 15, and thus void the user’s authority to operate the equipment. . A.1 - LABEL INSTRUCTION INSTRUCTION MANUAL FOR FCC ID LABELING Module type : ZigBee® module SPZB32W1A2.1 / SPZB32W1C2.1 FCC-ID : S9NZB32C2 This intends to inform you how to specify the FCC ID of our ZigBee module SPZB32W1A2.1 / SPZB32W1C2.1 on your final product. Based on the Public Notice from FCC, the product into which our transmitter module is installed must display a label referring to the enclosed module. The label should use wording such as “Contains Transmitter module FCC ID: S9NZB32C2 or “Contains FCC ID: S9NZB32C2 , any similar wording that expressed the same meaning may be use. It shows an example below Contains FCC ID: S9NZB32C2
SPZB32W1A2.1 / SPZB32W1C2.1 11/12 A.2 - Special requirement for Modular application The following requirements are fulfilled: 1) The modular transmitter must have its own RF shielding: The RF module used on the board fulfils the emission requirements of the FCC rules without additional shielding. 2) The modular transmitter must have buffered modulation/data inputs: The module has a memory management unit inside of the IC. The processor interfacing with the external application by means general purpose I/O ( GPIO) , Uart, SPI. The processor interfaces also the RF part of the module exchanging data and command with it. Inside the processor a flash memory is available to download the customer application and the ZigBee profiles. 3) The modular transmitter must have its own power supply regulation: The IC contains an own voltage regulation. In case of changes in the supply voltage VCC (for example caused by temperature changes or other effects), the internal voltage will be stabilized. 4) The modular transmitter must comply with the antenna requirements of Section 15.203 and 15.204: The RF module is for OEM (Original Equipment Manufacturer) integration only. The end-user product will be professionally installed in such a manner that only the authorized antenna is used. 5) The modular transmitter must be tested in a stand-alone configuration: The RF module was tested in a stand-alone configuration. 6) The modular transmitter must be labelled with its own FCC ID number: The RF module will be labelled with its own FCC ID number. When the module is installed inside the end-product, the label is not visible. The OEM manufacturer is instructed how to apply the exterior label. 7) The modular transmitter must comply with any specific rule or operating requirements applicable to the transmitter and the manufacturer must provide adequate instructions along with the module to explain any such requirements: The EUT is compliant with all applicable FCC rules. Detail instructions are given in the product Users Guide. 8) The modular transmitter must comply with any applicable RF exposure requirements. • Maximum measured power output: 1.90 mW (2.77 dBm ) • Maximum antenna gain: 2.2 dBi (see also FCC test report) Maximum permissible exposure defined in 47 CFR 1.1310: 1 mW/cm². The RF module operates at low power level so it does not exceed the Commission’s RF exposure guidelines limits; furthermore, Spread spectrum transmitters operate according to the Section 15.247 are categorically excluded from routine environmental evaluation.
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