Telit Communications S p A GL865Q Quadband GSM/ GPRS Module User Manual 1vv0300910 GL865 Hardware User Guide r1

Telit Communications S.p.A. Quadband GSM/ GPRS Module 1vv0300910 GL865 Hardware User Guide r1

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GL865Q User Manual HTML Version

User Manual

GL865 Hardware User Guide

1vv0300910

Rev.

–

GL865 Hardware User Guide

1vv0300910 Rev.1 – 2011-07-22

page 2 of 79

APPLICABILITY TABLE

PRODUCT

GL865 QUAD

GL865 DUAL

GL865 Hardware User Guide

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DISCLAIMER

The information contained in this document is the proprietary

information of Telit Communications S.p.A. and its affiliates

(“TELIT”). The contents are confidential and any disclosure to

persons other than the officers, employees, agents or

subcontractors of the owner or licensee of this document,

without the prior written consent of Telit, is strictly

prohibited.

Telit makes every effort to ensure the quality of the

information it makes available. Notwithstanding the foregoing,

Telit does not make any warranty as to the information contained

herein, and does not accept any liability for any injury, loss

or damage of any kind incurred by use of or reliance upon the

information.

Telit disclaims any and all responsibility for the application

of the devices characterized in this document, and notes that

the application of the device must comply with the safety

standards of the applicable country, and where applicable, with

the relevant wiring rules.

Telit reserves the right to make modifications, additions and

deletions to this document due to typographical errors,

inaccurate information, or improvements to programs and/or

equipment at any time and without notice. Such changes will,

nevertheless be incorporated into new editions of this

application note.

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Contents

INTRODUCTION ......................................................................................................................................................... 6

1.1.

COPE

......................................................................................................................................................................... 6

1.2.

UDIENCE

.................................................................................................................................................................... 6

1.3.

ONTACT

NFORMATION

UPPORT

.................................................................................................................................. 6

1.4.

OCUMENT

RGANIZATION

............................................................................................................................................ 6

1.5.

EXT

ONVENTIONS

....................................................................................................................................................... 7

1.6.

ELATED

OCUMENTS

................................................................................................................................................... 8

1.7.

OCUMENT

ISTORY

..................................................................................................................................................... 8

OVERVIEW .............................................................................................................................................................. 10

GL865 MECHANICAL DIMENSIONS .......................................................................................................................... 12

GL865 MODULE CONNECTIONS ............................................................................................................................... 13

4.1.

PIN-OUT .................................................................................................................................................................. 13

4.2.

AYOUT

............................................................................................................................................................... 16

HARDWARE COMMANDS ........................................................................................................................................ 17

5.1.

UTO

-T

URNING

THE

GL865 ................................................................................................................................... 17

5.2.

URNING

OFF

THE

GL865 ........................................................................................................................................... 19

5.3.

ESETTING THE

GL865 ................................................................................................................................................ 21

5.3.1.

Hardware Unconditional restart .................................................................................................................... 21

POWER SUPPLY ....................................................................................................................................................... 23

6.1.

OWER

UPPLY

EQUIREMENTS

..................................................................................................................................... 23

6.2.

OWER

ONSUMPTION

................................................................................................................................................ 24

6.3.

ENERAL

ESIGN

ULES

............................................................................................................................................... 25

6.3.1.

Electrical Design Guidelines ........................................................................................................................... 25

6.3.2.

Thermal Design Guidelines ............................................................................................................................ 29

6.3.3.

Power Supply PCB layout Guidelines ............................................................................................................. 30

ANTENNA ................................................................................................................................................................ 32

7.1.

GSM

NTENNA

EQUIREMENTS

.................................................................................................................................... 32

7.2.

GSM

NTENNA

PCB

LINE

UIDELINES

.......................................................................................................................... 33

7.3.

GSM

NTENNA

NSTALLATION

UIDELINES

................................................................................................................... 37

LOGIC LEVEL SPECIFICATIONS .................................................................................................................................. 38

8.1.

ESET SIGNAL

............................................................................................................................................................. 39

SERIAL PORTS .......................................................................................................................................................... 41

9.1.

MODEM

SERIAL

PORT ............................................................................................................................................. 41

9.2.

RS232

LEVEL TRANSLATION

.......................................................................................................................................... 43

9.3.

................................................................................................................................................................................ 46

9.4.

UART

LEVEL TRANSLATION

...................................................................................................................................... 47

10.

AUDIO SECTION OVERVIEW ................................................................................................................................ 49

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10.1.

LECTRICAL

HARACTERISTICS

........................................................................................................................................ 52

10.1.1.

Input Lines ..................................................................................................................................................... 52

10.1.2.

Output Lines................................................................................................................................................... 53

11.

GENERAL PURPOSE I/O ....................................................................................................................................... 55

11.1.

GPIO

OGIC LEVELS

..................................................................................................................................................... 56

11.2.

SING A

GPIO

AD AS

INPUT ...................................................................................................................................... 57

11.3.

SING A

GPIO

AD AS

OUTPUT .................................................................................................................................. 57

11.4.

SING THE

RFTXMON

UTPUT

GPIO5 ......................................................................................................................... 57

11.5.

SING THE

LARM

UTPUT

GPIO6 ............................................................................................................................... 58

11.6.

SING THE

UZZER

UTPUT

GPIO7 ............................................................................................................................... 58

11.7.

AGNETIC

UZZER

ONCEPTS

....................................................................................................................................... 59

1.1.1 Short Description .................................................................................................................................................... 59

11.7.1.

Frequency Behaviour ..................................................................................................................................... 60

11.7.2.

Power Supply Influence .................................................................................................................................. 60

11.7.3.

Working Current Influence ............................................................................................................................. 61

11.8.

STAT

LED

NDICATION OF NETWORK SERVICE AVAILABILITY

................................................................................................. 61

11.9.

SIMIN

DETECTION

...................................................................................................................................................... 62

11.10.

RTC

YPASS OUT

.................................................................................................................................................... 64

11.11.

SIM

OLDER

MPLEMENTATION

................................................................................................................................ 64

12.

DAC AND ADC SECTION ....................................................................................................................................... 65

12.1.

DAC

ONVERTER

........................................................................................................................................................ 65

12.1.1.

Description ..................................................................................................................................................... 65

12.1.2.

Enabling DAC ................................................................................................................................................. 66

12.1.3.

Low Pass Filter Example................................................................................................................................. 66

12.2.

ADC

ONVERTER

........................................................................................................................................................ 67

12.2.1.

Description ..................................................................................................................................................... 67

12.2.2.

Using ADC Converter ..................................................................................................................................... 67

12.3.

EBUG OF THE

GL865

IN PRODUCTION

........................................................................................................................... 67

13.

MOUNTING THE GL865 ON YOUR BOARD ........................................................................................................... 69

13.1.

ENERAL

................................................................................................................................................................... 69

13.2.

ODULE FINISHING

DIMENSIONS

................................................................................................................................ 69

13.3.

ECOMMENDED FOOT PRINT FOR THE APPLICATION

........................................................................................................... 70

13.4.

OLDER PASTE

............................................................................................................................................................ 71

13.4.1.

GL865 Solder reflow ....................................................................................................................................... 71

14.

PACKING SYSTEM ................................................................................................................................................ 73

14.1.

OISTURE SENSIBILITY

................................................................................................................................................. 74

15.

CONFORMITY ASSESSMENT ISSUES ..................................................................................................................... 75

16.

SAFETY RECOMMANDATIONS ............................................................................................................................. 76

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1. Introduction

1.1. Scope

The aim of this document is the description of some hardware solutions

useful for developing a product with the Telit GL865 module.

1.2. Audience

This document is intended for Telit customers, who are integrators,

about to implement their applications using our GL865 modules.

1.3. Contact Information, Support

For general contact, technical support, to report documentation errors

and to order manuals, contact Telit’s Technical Support Center (TTSC)

at:

TS-EMEA@telit.com

TS-NORTHAMERICA@telit.com

TS-LATINAMERICA@telit.com

TS-APAC@telit.com

Alternatively, use:

http://www.telit.com/en/products/technical-support-center/contact.php

For detailed information about where you can buy the Telit modules or

for recommendations on accessories and components visit:

http://www.telit.com

To register for product news and announcements or for product questions

contact Telit’s Technical Support Center (TTSC).

Our aim is to make this guide as helpful as possible. Keep us informed

of your comments and suggestions for improvements.

Telit appreciates feedback from the users of our information.

1.4. Document Organization

This document contains the following chapters:

Chapter 1: “Introduction” provides a scope for this document, target

audience, contact and support information, and text conventions.

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Chapter 2: “Overview” provides an overview of the document.

Chapter 3: “GL865 Mechanical Dimensions”

Chapter 4: “GL865 Module Connections” deals with the pin out

configuration and layout.

Chapter 5: “Hardware Commands” How to operate on the module via

hardware.

Chapter 6: “Power supply” Power supply requirements and general design

rules.

Chapter 7: “Antenna” The antenna connection and board layout design are

the most important parts in the full product design.

Chapter 8: “Logic Level specifications” Specific values adopted in the

implementation of logic levels for this module.

Chapter 9: “Serial ports” The serial port on the Telit GL865 is the

core of the interface between the module and OEM hardware

Chapter 10: “Audio Section overview” Refers to the audio blocks of the

Base Band Chip of the GL865 Telit Modules.

Chapter 11: “General Purpose I/O” How the general purpose I/O pads can

be configured.

Chapter 12 “DAC and ADC Section” Deals with these two kind of

converters.

Chapter 13: “Mounting the GL865 on the application board”

Recommendations and specifics on how to mount the module on the user’s

board.

1.5. Text Conventions

Danger – This information MUST be followed or catastrophic equipment

failure or bodily injury may occur.

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Caution or Warning – Alerts the user to important points about

integrating the module, if these points are not followed, the module

and end user equipment may fail or malfunction.

Tip or Information – Provides advice and suggestions that may be useful

when integrating the module.

All dates are in ISO 8601 format, i.e. YYYY-MM-DD.

1.6. Related Documents

• Telit's GSM/GPRS Family Software User Guide, 1vv0300784

• Audio settings application note , 80000NT10007a

• Digital Voice Interface Application Note, 80000NT10004a

• GL865 Product description, 80370ST10080a

• SIM Holder Design Guides, 80000NT10001a

• AT Commands Reference Guide, 80000ST10025a

• Telit EVK2 User Guide, 1vv0300704

1.7. Document History

ISSUE#0 2011-01-05 First ISSUE

ISSUE#1 2011-07-22 Add FCC IC note in Safety recommendations

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2. Overview

The aim of this document is the description of some hardware

solutions useful for developing a product with the Telit GL865

module.

In this document all the basic functions of a mobile phone will

be taken into account; for each one of them a proper hardware

solution will be suggested and eventually the wrong solutions

and common errors to be avoided will be evidenced. Obviously

this document cannot embrace the whole hardware solutions and

products that may be designed. The wrong solutions to be avoided

shall be considered as mandatory, while the suggested hardware

configurations shall not be considered mandatory, instead the

information given shall be used as a guide and a starting point

for properly developing your product with the Telit GL865 module.

For further hardware details that may not be explained in this

document refer to the Telit GL865 Product Description document

where all the hardware information is reported.

NOTICE:

(

EN) The integration of the GSM/GPRS GL865 cellular module within

user application shall be done according to the design rules

described in this manual.

(IT) L’integrazione del modulo cellulare GSM/GPRS

GL865

all’interno

dell’applicazione dell’utente dovrà rispettare le indicazioni

progettuali descritte in questo manuale.

(DE) Die Integration des

GL865

GSM/GPRS Mobilfunk-Moduls in ein Gerät

muß gemäß der in diesem Dokument beschriebenen Kunstruktionsregeln

erfolgen.

(SL) Integracija GSM/GPRS

GL865

modula v uporabniški aplikaciji bo

morala upoštevati projektna navodila, opisana v tem piročniku.

(SP) La utilización del modulo GSM/GPRS

GL865

debe ser conforme a los

usos para los cuales ha sido deseñado descritos en este manual del

usuario.

(FR) L’intégration du module cellulaire GSM/GPRS

GL865

dans

l’application de l’utilisateur sera faite selon les règles de

conception décrites dans ce manuel.

(HE)

The information presented in this document is believed to be

accurate and reliable. However, no responsibility is assumed by

GL865

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Telit Communications S.p.A. for its use, nor any infringement of

patents or other rights of third parties which may result from

its use. No license is granted by implication or otherwise under

any patent rights of Telit Communications S.p.A. other than for

circuitry embodied in Telit products. This document is subject

to change without notice.

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3. GL865 Mechanical Dimensions

The GL865 overall dimensions are:

• Length: 24.4 mm

• Width: 24.4 mm

• Thickness: 2.7 mm

• Weight 2.48 g

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4. GL865 module connections

4.1. PIN-OUT

Pad Signal I/

O Function Note Type

Audio

20 EAR- AO

Earphone signal output, phase - Audio

21 EAR+ AO

Earphone signal output, phase + Audio

22 MIC- AI

Mic.signal input; phase- Audio

24 MIC+ AI

Mic.signal input; phase+ Audio

23 AGND - Analog Ground -

SIM card interface

9 SIMVCC - External SIM signal – Power supply for

the SIM 1,8 / 3V

10 SIMRST O External SIM signal – Reset 1,8 / 3V

11 SIMCLK O External SIM signal – Clock 1,8 / 3V

12 SIMIO I/

O External SIM signal – Data I/O 4.7K

Pull up 1,8 / 3V

All

GPI0

can be

program

med

SIMIN I Presence SIM input

(See para 11.9) CMOS 2.8V

Trace

44 RXD_AUX I Auxiliary UART (RX Data) CMOS 2.8V

45 TXD_AUX O Auxiliary UART (TX Data) CMOS 2.8V

Prog. / Data + HW Flow Control

1 C109/DCD/GPO O

Output for Data carrier detect signal

(DCD) to DTE

/ GP output

CMOS 2.8V

2 C125/RING/GPO O

Output for Ring indicator signal (RI)

to DTE

/ GP output

CMOS 2.8V

3 C107/DSR/GPO O

Output for Data set ready signal (DSR)

to DTE

/ GP output

CMOS 2.8V

4 C108/DTR/GPI I

Input for Data terminal ready signal

(DTR) from DTE

/ GP input

CMOS 2.8V

5 C105/RTS/GPI I

Input for Request to send signal (RTS)

from DTE

/ GP input

CMOS 2.8V

6 C106/CTS/GPO O

Output for Clear to send signal (CTS)

to DTE

/ GP output

CMOS 2.8V

7 C103/TXD I Serial data input (TXD) from DTE CMOS 2.8V

8 C104/RXD O Serial data output to DTE CMOS 2.8V

DAC and ADC

13 ADC_IN1 AI

Analog/Digital converter input A/D

14 ADC_IN2 AI

Analog/Digital converter input A/D

15 DAC_OUT AO

Digital/Analog converter output D/A

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Pad Signal I/

O Function Note Type

Miscellaneous Functions

30 VRTC AO

VRTC Backup Power

47 RESET* I Reset input CMOS 1.8V

43 V_AUX / PWRMON O 2.8V stabilized output Imax=100mA

/ Power ON monitor Power Out

2.8V

34 Antenna O Antenna output – 50 Ω RF

GPIO

42 GPIO_01 /

DVI_WA0

GPIO01 Configurable GPIO

/ Digital Audio Interface (WA0) CMOS 2.8V

41 GPIO_02 / JDR /

DVI_RX

GPIO02 Configurable GPIO / Jammer

Detect Report

/ Digital Audio Interface (RX)

CMOS 2.8V

40 GPIO_03 /

DVI_TX

GPIO03 Configurable GPIO

/ Digital Audio Interface (TX) CMOS 2.8V

39 GPIO_04 / TX

Disable /

DVI_CLK

GPIO04 Configurable GPIO / TX Disable

input

/ Digital Audio Interface (CLK)

CMOS 2.8V

29 GPIO_05 /

RFTXMON

GPIO05 Configurable GPIO

/ Transmitter ON monitor CMOS 2.8V

28 GPIO_06 / ALARM I/

GPIO06 Configurable GPIO

/ ALARM CMOS 2.8V

27 GPIO_07 /

BUZZER

GPIO07 Configurable GPIO

/ Buzzer CMOS 2.8V

26 GPIO_08 /

STAT_LED

GPIO08 Configurable GPIO

/ STAT LED CMOS 2.8V

Power Supply

38 VBATT - Main power supply (Baseband) Power

37 VBATT_PA - Main power supply (Radio PA) Power

23 AGND - AF Signal Ground (see audio section) AF Signal

32 GND - Ground Power

33 GND - Ground Power

35 GND - Ground Power

36 GND - Ground Power

46 GND - Ground Power

RESERVED

48 -

16 -

17 -

18 -

19 -

25 -

31 -

WARNING:

Reserved pins must not be connected.

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NOTE:

If not used, almost all pins should be left disconnected. The

only exceptions are the following pins:

signal

38, 37 VBATT & VBATT_PA

32, 33, 35, 36, 46 GND

23 AGND

7 TXD

8 RXD

5 RTS

43 V_AUX / PWRMON

47 RESET*

45 TXD_AUX

44 RXD_AUX

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4.2. Pin Layout

TOP VIEW

NOTE:

The pin defined as NC/RFU has to be considered RESERVED and

don’t connect on any pin in the application.

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5. Hardware Commands

5.1. Auto-Turning ON the GL865

To Auto-turn on the GL865, the power supply must be applied on

the power pins VBATT and VBATT_PA, after 1000 m-seconds, the

V_AUX / PWRMON

pin will be at the high logic level and the module

can be consider fully operating.

When the power supply voltage is lower than 3.4V, after 4000 m-

seconds, the

V_AUX / PWRMON

pin will be at the high logic level

and the module can be consider fully operating.

The following flow chart shows the proper turn on procedure:

Modem ON Proc.

PWR supply =

ON?

Delay 1s - 4s

for Low Voltage

Operating

Modem Reset Proc

init sequence

Start AT CMD

PWMON = ON?

Delay 300mS

Enter AT<CR>

AT answer in

1second ?

Delay 1s

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NOTE:

The power supply on the pins VBATT and VBATT_PA must be applied

at the same time or for the special application in the first

apply the VBATT_PA and in second time apply VBATT, never vice

versa in this case can be damage the unit.

NOTE:

In order to avoid a back powering effect it is recommended to

avoid having any HIGH logic level signal applied to the digital

pins of the GL865 when the module is powered OFF or during an

ON/OFF transition.

A flow chart showing the AT command managing procedure is displayed below:

Modem ON Proc.

Disconnect PWR

supply

AT init

sequence.

Delay 300mS

Enter AT<CR>

AT answer in

1second ?

Start AT CMD.

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5.2. Turning OFF the GL865

Turning off of the device can be done in two ways:

• General turn OFF

• Processor turn OFF

General turn OFF – disconnect the power supply from the both

power pins VBATT and VBATT_PA at the same time. In this case all

parts of the module are in OFF condition, any power consumption

is present.

Processor turn OFF – disconnect the power supply only from the

power pin VBATT, the power pin VBATT_PA can be connected to

power supply, in this case a low, about 30uA, power consumption

is present

Before any of both OFF procedure will be applied, the AT#SYSHALT

AT command must be send (see AT Commands Reference Guide,

80000ST10025a), after the OK response message, check the

V_AUX /

PWRMON

pin, when the logic level is low the module can be

consider fully not operating and at this moment is possible

disconnect the Power Supply

The following flow chart shows the proper turnoff procedure:

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TIP:

To check if the device has been powered off, the hardware line

PWRMON must be monitored. The device is powered off when PWRMON

goes low.

NOTE:

In order to avoid a back powering effect it is recommended to

avoid having any HIGH logic level signal applied to the digital

pins of the GL865 when the module is powered OFF or during an

ON/OFF transition.

Modem OFF

Proc.

PWRMON = OFF?

Place AT command

AT#SYSHALT

Disconnect PWR

supply

Disconnect PWR

supply

Wait

PWRMON =OFF

15s timeout

Modem ON

Proc.

Delay 1.5s

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5.3. Resetting the GL865

5.3.1. Hardware Unconditional restart

WARNING:

The hardware unconditional Restart must not be used during

normal operation of the device since it does not detach the

device from the network. It shall be kept as an emergency exit

procedure to be done in the rare case that the device gets

stacked waiting for some network or SIM responses.

To unconditionally reboot the GL865, the pad RESET* must be tied

low for at least 200 milliseconds and then released.

NOTE:

Do not use any pull up resistor on the RESET* line nor any totem

pole digital output. Using pull up resistor may bring to latch

up problems on the GL865 power regulator and improper

functioning of the module. The line RESET* must be connected

only in open collector configuration; the transistor must be

connected as close as possible to the RESET* pin.

TIP:

The unconditional hardware restart must always be implemented on

the boards and the software must use it as an emergency exit

procedure.

A simple circuit to do it is:

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In the following flow chart is detailed the proper restart

procedure:

NOTE:

In order to avoid a back powering effect it is recommended to

avoid having any HIGH logic level signal applied to the digital

pins of the GL865 when the module is powered OFF or during an

ON/OFF transition.

Modem Reset

Proc.

Reset = LOW

Delay 200ms

Reset = HIGH

PWRMON =

OFF

Delay 1s Start AT

CMD.

Modem ON

Proc.

Delay 1,5s

Disconnect PWR

supply

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6. Power Supply

The power supply circuitry and board layout are a very important

part in the full product design and they strongly reflect on the

product overall performances, hence read carefully the

requirements and the guidelines that will follow for a proper

design.

6.1. Power Supply Requirements

The external power supply must be connected to VBATT & VBATT_PA

signals and must fulfill the following requirements:

POWER SUPPLY

Nominal Supply Voltage

3.8 V

Normal Operating Voltage

Range

3.4 V÷ 4.20 V

Extended Operating Voltage

Range

3.22 V÷ 4.50 V

NOTE:

The Operating Voltage Range MUST never be exceeded; care must be

taken in order to fulfil min/max voltage requirement.

NOTE:

Overshoot voltage (regarding MAX Extended Operating Voltage) and

drop in voltage (regarding MIN Extended Operating Voltage) MUST

never be exceeded;

The “Extended Operating Voltage Range” can be used only with

completely assumption and application of the HW User guide

suggestions.

NOTE:

When the power supply voltage is lower than 3.4V, after 4000 m-

seconds, the

V_AUX / PWRMON

pin will be at the high logic level

and the module can be consider fully operating. See para 5.1.

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6.2. Power Consumption

The GL865 power consumptions are:

GL 865

Mode Average

(mA) Mode description

SWITCHED OFF Module power supplied only on VBATT_PA pin,

the VBATT pin is not power supplied.

Switched Off <5uA

Switched Off

with

AT#SYSHALT

<650uA

Module power supplied on VBATT_PA pin and

VBATT pin, the at command

AT#SYSHALT

applied.

IDLE mode

AT+CFUN=1

21,0

Normal mode: full functionality of the

module

AT+CFUN=4

18,0

Disabled TX and RX; module is not

registered on the network

AT+CFUN=0 or

3,9

Paging Multiframe 2

2,5

Paging Multiframe 3

2,4

Paging Multiframe 4

1,5

Paging Multiframe 9

CSD TX and RX mode

GSM VOICE CALL

GSM900 CSD PL5

230

DCS1800 CSD

PL0

180

GPRS (class 8) 1TX

GPRS Sending data mode GSM900 PL5

225

DCS1800 PL0

175

GPRS (class 10) 2TX

GPRS Sending data mode

GSM900 PL5 360

DCS1800 PL0 300

The GSM system is made in a way that the RF transmission is

not continuous, else it is packed into bursts at a base

frequency of about 216 Hz, and the relative current peaks

can be as high as about 2A. Therefore the power supply has

to be designed in order to withstand with these current

peaks without big voltage drops; this means that both the

electrical design and the board layout must be designed for

this current flow.

If the layout of the PCB is not well designed a strong

noise floor is generated on the ground and the supply; this

will reflect on all the audio paths producing an audible

annoying noise at 216 Hz; if the voltage drop during the

peak current absorption is too much, then the device may

even shutdown as a consequence of the supply voltage drop.

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NOTE:

The electrical design for the Power supply should be made

ensuring it will be capable of a peak current output of at least

2 A.

6.3. General Design Rules

The principal guidelines for the Power Supply Design embrace

three different design steps:

• the electrical design

• the thermal design

• the PCB layout.

6.3.1. Electrical Design Guidelines

The electrical design of the power supply depends strongly from

the power source where this power is drained. We will

distinguish them into three categories:

• +5V input (typically PC internal regulator output)

• +12V input (typically automotive)

• Battery

6.3.1.1. + 5V input Source Power Supply Design Guidelines

The desired output for the power supply is 3.8V, hence there's

not a big difference between the input source and the desired

output and a linear regulator can be used. A switching power

supply will not be suited because of the low drop out

requirements.

When using a linear regulator, a proper heat sink shall be

provided in order to dissipate the power generated.

A Bypass low ESR capacitor of adequate capacity must be provided

in order to cut the current absorption peaks close to the GL865,

a 100µF tantalum capacitor is usually suited.

Make sure the low ESR capacitor on the power supply output

(usually a tantalum one) is rated at least 10V.

A protection diode should be inserted close to the power input,

in order to save the GL865 from power polarity inversion.

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An example of linear regulator with 5V input is:

6.3.1.2. + 12V input Source Power Supply Design Guidelines

The desired output for the power supply is 3.8V, hence due to

the big difference between the input source and the desired

output, a linear regulator is not suited and shall not be used.

A switching power supply will be preferable because of its

better efficiency especially with the 2A peak current load

represented by the GL865.

When using a switching regulator, a 500kHz or more switching

frequency regulator is preferable because of its smaller

inductor size and its faster transient response. This allows the

regulator to respond quickly to the current peaks absorption.

In any case the frequency and Switching design selection is

related to the application to be developed due to the fact the

switching frequency could also generate EMC interferences.

For car PB battery the input voltage can rise up to 15,8V and

this should be kept in mind when choosing components: all

components in the power supply must withstand this voltage.

A Bypass low ESR capacitor of adequate capacity must be provided

in order to cut the current absorption peaks, a 100µF tantalum

capacitor is usually suited.

Make sure the low ESR capacitor on the power supply output

(usually a tantalum one) is rated at least 10V.

For Car applications a spike protection diode should be inserted

close to the power input, in order to clean the supply from

spikes.

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A protection diode should be inserted close to the power input,

in order to save the GL865 from power polarity inversion. This

can be the same diode as for spike protection.

An example of switching regulator with 12V input is in the below

schematic (split in 2 parts):

6.3.1.3. Battery Source Power Supply Design Guidelines

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The desired nominal output for the power supply is 3.8V and the

maximum voltage allowed is 4.2V, hence a single 3.7V Li-Ion cell

battery type is suited for supplying the power to the Telit

GL865 module.

WARNING:

The three cells Ni/Cd or Ni/MH 3,6 V Nom. battery types or 4V PB

types MUST NOT BE USED DIRECTLY since their maximum voltage can

rise over the absolute maximum voltage for the GL865 and damage

it.

NOTE:

DON'T USE any Ni-Cd, Ni-MH, and Pb battery types directly

connected with GL865. Their use can lead to overvoltage on the

GL865 and damage it. USE ONLY Li-Ion battery types.

A Bypass low ESR capacitor of adequate capacity must be provided

in order to cut the current absorption peaks, a 100µF tantalum

capacitor is usually suited.

Make sure the low ESR capacitor (usually a tantalum one) is

rated at least 10V.

A protection diode should be inserted close to the power input,

in order to save the GL865 from power polarity inversion.

Otherwise the battery connector should be done in a way to avoid

polarity inversions when connecting the battery.

The battery capacity must be at least 500mAh in order to

withstand the current peaks of 2A; the suggested capacity is

from 500mAh to 1000mAh.

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6.3.2. Thermal Design Guidelines

The thermal design for the power supply heat sink should be done

with the following specifications:

See para 7.2 Power Consumption

NOTE:

The average consumption during transmissions depends on the

power level at which the device is requested to transmit by the

network. The average current consumption hence varies

significantly.

Considering the very low current during idle, especially if

Power Saving function is enabled, it is possible to consider

from the thermal point of view that the device absorbs current

significantly only during calls.

For the heat generated by the GL865, you can consider it to be

during transmission 1W max during CSD/VOICE calls and 2W max

during class10 GPRS upload.

This generated heat will be mostly conducted to the ground plane

under the GL865; you must ensure that your application can

dissipate it.

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6.3.3. Power Supply PCB layout Guidelines

As seen on the electrical design guidelines the power supply

shall have a low ESR capacitor on the output to cut the current

peaks and a protection diode on the input to protect the supply

from spikes and polarity inversion. The placement of these

components is crucial for the correct working of the circuitry.

A misplaced component can be useless or can even decrease the

power supply performances.

The Bypass low ESR capacitor must be placed close to the Telit

GL865 power input pads or in the case the power supply is a

switching type it can be placed close to the inductor to cut the

ripple provided the PCB trace from the capacitor to the GL865 is

wide enough to ensure a dropless connection even during the 2A

current peaks.

The protection diode must be placed close to the input connector

where the power source is drained.

The PCB traces from the input connector to the power regulator

IC must be wide enough to ensure no voltage drops occur when the

2A current peaks are absorbed. Note that this is not made in

order to save power loss but especially to avoid the voltage

drops on the power line at the current peaks frequency of 216 Hz

that will reflect on all the components connected to that supply,

introducing the noise floor at the burst base frequency. For

this reason while a voltage drop of 300-400 mV may be acceptable

from the power loss point of view, the same voltage drop may not

be acceptable from the noise point of view. If your application

doesn't have audio interface but only uses the data feature of

the Telit GL865, then this noise is not so disturbing and power

supply layout design can be more forgiving.

The PCB traces to the GL865 and the Bypass capacitor must be

wide enough to ensure no significant voltage drops occur when

the 2A current peaks are absorbed. This is for the same reason

as previous point. Try to keep this trace as short as possible.

The PCB traces connecting the Switching output to the inductor

and the switching diode must be kept as short as possible by

placing the inductor and the diode very close to the power

switching IC (only for switching power supply). This is done in

order to reduce the radiated field (noise) at the switching

frequency (100-500 kHz usually).

The use of a good common ground plane is suggested.

The placement of the power supply on the board should be done in

such a way to guarantee that the high current return paths in

the ground plane are not overlapped to any noise sensitive

circuitry as the microphone amplifier/buffer or earphone

amplifier.

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The power supply input cables should be kept separate from noise

sensitive lines such as microphone/earphone cables.

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7. Antenna

The antenna connection and board layout design are the most

important aspect in the full product design as they strongly

affect the product overall performances, hence read carefully

and follow the requirements and the guidelines for a proper

design.

7.1. GSM Antenna Requirements

As suggested on the Product Description the antenna and antenna

transmission line on PCB for a Telit GL865 device shall fulfil the

following requirements:

ANTENNA REQUIREMENTS

QUAD

DUAL

Frequency range

824-894 MHz GSM850 band

880-960 MHz GSM900 band

1710-1885MHz DCS1800 band

1850

1990MHz PCS1900 band

880-960 MHz GSM900 band

1710-1885MHz MHz DCS1800

band

Gain

1.4dBi @ GSM900 and 3dBi @

DCS1800

1.4dBi @ GSM850 and 3dBi @

PCS1900

1.4dBi @ GSM900 and 3dBi @

DCS1800

Impedance 50 Ohm 50 Ohm

Input power > 2 W > 2 W

VSWR absolute

max

≤ 10:1 (limit to avoid

permanent damage)

≤ 10:1 (limit to avoid

permanent damage)

VSWR recommended ≤

2:1 (limit to fulfil all

regulatory requirements)

≤

2:1 (limit to fulfil all

regulatory requirements)

When using the GL865, since there's no antenna connector on the

module, the antenna must be connected to the GL865 antenna pad

(pin 34) by means of a transmission line implemented on the PCB.

In the case the antenna is not directly connected at the antenna

pad of the GL865, then a PCB line is needed in order to connect

with it or with its connector.

This line of transmission shall fulfill the following

requirements:

ANTENNA LINE ON PCB REQUIREMENTS

Characteristic

Impedance

50 Ohm

Max Attenuation 0,3 dB

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Coupling with other signals shall be

avoided

Cold End (Ground Plane) of antenna shall be

equipotential to the

GL865

ground pins

7.2. GSM Antenna - PCB line Guidelines

Make sure that the transmission line’s characteristic impedance

is 50Ω;

Keep the length of line on the PCB as short as possible, since

the antenna line loss shall be less than about 0,3 dB;

Line geometry should have uniform characteristics, constant

cross section, avoid meanders and abrupt curves;

Any kind of suitable geometry / structure (Microstrip, Stripline,

Coplanar, Grounded Coplanar Waveguide...) can be used for

implementing the printed transmission line afferent the antenna;

If a Ground plane is required in line geometry, that plane has

to be continuous and sufficiently extended, so the geometry can

be as similar as possible to the related canonical model;

Keep, if possible, at least one layer of the PCB used only for

the Ground plane. If possible, use this layer as reference

Ground plane for the transmission line;

It is wise to surround (on both sides) the PCB transmission line

with Ground, avoid having other signal tracks facing directly

the antenna line track.

Avoid crossing any un-shielded transmission line footprint with

other signal tracks on different layers;

The ground surrounding the antenna line on PCB has to be

strictly connected to the main Ground Plane by means of via

holes (once per 2mm at least), placed close to the ground edges

facing line track;

Place EM noisy devices as far as possible from GL865 antenna

line;

Keep the antenna line far away from the GL865 power supply

lines;

If EM noisy devices are present on the PCB hosting the GL865,

such as fast switching ICs, take care of the shielding of the

antenna line by burying it inside the layers of PCB and surround

it with Ground planes, or shield it with a metal frame cover.

If EM noisy devices are not present around the line, the use of

geometries like Microstrip or Grounded Coplanar Waveguide has to

be preferred, since they typically ensure less attenuation if

compared to a Stripline having same length;

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7.3. PCB Guidelines in case of FCC certification

In the case FCC certification is required for an application using

GL865, according to FCC KDB 996369 for modular approval requirements,

the transmission line has to be similar to that implemented on GL865

interface board and described in the following chapter.

7.3.1. Transmission line design

During the design of the GL865 interface board, the placement of

components has been chosen properly, in order to keep the line length

as short as possible, thus leading to lowest power losses possible. A

Grounded Coplanar Waveguide (G-CPW) line has been chosen, since this

kind of transmission line ensures good impedance control and can be

implemented in an outer PCB layer as needed in this case. A SMA

female connector has been used to feed the line.

The interface board is realized on a FR4, 4-layers PCB. Substrate

material is characterized by relative permittivity ε

= 4.6 ± 0.4 @ 1

GHz, TanD= 0.019 ÷ 0.026 @ 1 GHz.

A characteristic impedance of nearly 50 Ω is achieved using trace

width = 1.1 mm, clearance from coplanar ground plane = 0.3 mm each

side. The line uses reference ground plane on layer 3, while copper

is removed from layer 2 underneath the line. Height of trace above

ground plane is 1.335 mm. Calculated characteristic impedance is 51.6

Ω, estimated line loss is less than 0.1 dB. The line geometry is

shown below:

0.3 mm

0.035 mm

0.3 mm

6.2 mm

FR4

0.035 mm

1.335 mm

0.2 mm

1.1 mm

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7.3.2. Transmission line measurements

HP8753E VNA (Full-2-port calibration) has been used in this

measurement session. A calibrated coaxial cable has been soldered at

the pad corresponding to GL865 RF output; a SMA connector has been

soldered to the board in order to characterize the losses of the

transmission line including the connector itself. During Return Loss

/ impedance measurements, the transmission line has been terminated

to 50 Ω load.

Return Loss plot of line under test is shown below:

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Line input impedance (in Smith Chart format, once the line has been

terminated to 50 Ω load) is shown in the following figure:

Insertion Loss of G-CPW line plus SMA connector is shown below:

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7.4. GSM Antenna - Installation Guidelines

Install the antenna in a place covered by the GSM signal.

Antenna shall not be installed inside metal cases

Antenna shall be installed also according Antenna manufacturer

instructions.

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8. Logic level specifications

Where not specifically stated, all the interface circuits work

at 2.8V CMOS logic levels. The following table shows the logic

level specifications used in the GL865 interface circuits:

Absolute Maximum Ratings -Not Functional

Parameter Min Max

Input level on any digital

pin (CMOS 2.8) when on

-0.3V

+3.1V

Input level on any digital

pin (CMOS 1.8) when on

-0.3V

+2.1V

Input voltage on analog

pins when on

-0.3V

+3.0 V

Operating Range - Interface levels (2.8V CMOS)

Level Min Max

Input high level 2.1V 3.1V

Input low level 0V 0.5V

Output high level 2.2V 3.1V

Output low level 0V 0.35V

For 1.8V signals:

Operating Range - Interface levels (1.8V CMOS)

Level Min Max

Input high level 1.6V 2.0V

Input low level 0V 0.4V

Output high level 1,65V 2.0V

Output low level 0V 0.35V

Current characteristics

Level Typical

Output Current 1mA

Input Current 1uA

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8.1. Reset signal

Signal Function I/O pin

RESET* Phone reset

I 47

RESET* is used to reset the GL865. Whenever this signal is pulled

low, the GL865 is reset. When the device is reset it stops any

operation. After the release of the reset GL865 is

unconditionally shut down, without doing any detach operation

from the network where it is registered. This behaviour is not a

proper shut down because any GSM device is requested to issue a

detach request on turn off. For this reason the Reset signal

must not be used to normally shutting down the device, but only

as an emergency exit in the rare case the device remains stuck

waiting for some network response.

The RESET* is internally controlled on start-up to achieve

always a proper power-on reset sequence, so there's no need to

control this pin on start-up. It may only be used to reset a

device already on that is not responding to any command.

NOTE:

Do not use this signal to power OFF the GL865. Use the ON/OFF

procedure to perform this function.

Reset Signal Operating levels:

Signal Min Max

RESET* Input high 1.8V(NOTE

2.1V

RESET* Input low 0V 0.2V

(NOTE1)

this signal is internally pulled up so the pin can be left

floating if not used.

If unused, this signal may be left unconnected. If used, then it

must always be connected with an open collector transistor, to

permit to the internal circuitry the power on reset and under

voltage lockout functions.

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9. Serial Ports

The serial port on the GL865 is the core of the interface

between the module and OEM hardware.

2 serial ports are available on the module:

MODEM SERIAL PORT 1 (MAIN)  for AT commands and Data

MODEM SERIAL PORT 2 (AUX)  for AT commands or Debug

9.1. MODEM SERIAL PORT

Several configurations can be designed for the serial port on

the OEM hardware, but the most common are:

RS232 PC com port

microcontroller UART @ 2.8V - 3V (Universal Asynchronous

Receive Transmit)

microcontroller UART @ 5V or other voltages different from 2.8V

Depending from the type of serial port on the OEM hardware a

level translator circuit may be needed to make the system work.

The only configuration that doesn't need a level translation is

the 2.8V UART.

The serial port on the GL865 is a +2.8V UART with all the 7

RS232 signals. It differs from the PC-RS232 in the signal

polarity (RS232 is reversed) and levels. The levels for the

GL865 UART are the CMOS levels:

Absolute Maximum Ratings -Not Functional

Parameter Min Max

Input level on any

digital pad when on

-0.3V +3.1V

Input voltage on

analog pads when on

-0.3V +3.1V

Operating Range - Interface levels (2.8V CMOS)

Level Min Max

Input hi

gh level

VIH

2.1V 3.1 V

Input low level

VIL

0V 0.5V

Output high level

VOH

2.2V 3.1V

Output low level

VOL

0V 0.35V

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The signals of the GL865 serial port are:

RS232

Number

Signal GL865

Pad Number

Name Usage

1 DCD - dcd_uart

1 Data Carrier

Detect

Output from the GL865 that

indicates the carrier

presence

2 RXD - tx_uart 8

Transmit line *see

Note

Output transmit line of

GL865 UART

3 TXD - rx_uart 7 Receive line *see

Note

Input receive of the GL865

UART

4 DTR - dtr_uart

4 Data Terminal

Ready

Input to the GL865 that

controls the DTE READY

condition

5 GND 32, 33,

35, 36, 46

Ground ground

6 DSR - dsr_uart

3 Data Set Ready

Output from the GL865 that

indicates the module is

ready

7 RTS -rts_uart 5 Request to Send

Input to the GL865 that

controls the Hardware flow

control

8 CTS - cts_uart

6 Clear to Send

Output from the GL865 that

controls the Hardware flow

control

9 RI - ri_uart 2 Ring Indicator

Output from the GL865 that

indicates the incoming call

condition

NOTE:

According to V.24, RX/TX signal names are referred to the

application side, therefore on the GL865 side these signal are

on the opposite direction: TXD on the application side will be

connected to the receive line (here named TXD/ rx_uart ) of the

GL865 serial port and viceversa for RX.

NOTE:

For a minimum implementation, only the TXD and RXD lines can be

connected, the other lines can be left open provided a software

flow control is implemented.

NOTE:

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In order to avoid a back powering effect it is recommended to

avoid having any HIGH logic level signal applied to the digital

pins of the GE865 when the module is powered off or during an

ON/OFF transition.

9.2. RS232 level translation

In order to interface the GL865 with a PC com port or a RS232

(EIA/TIA-232) application a level translator is required. This

level translator must:

• invert the electrical signal in both directions;

• change the level from 0/2.8V to +15/-15V .

Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets

accept signals with lower levels on the RS232 side (EIA/TIA-562),

allowing a lower voltage-multiplying ratio on the level

translator. Note that the negative signal voltage must be less

than 0V and hence some sort of level translation is always

required.

The simplest way to translate the levels and invert the signal

is by using a single chip level translator. There are a

multitude of them, differing in the number of drivers and

receivers and in the levels (be sure to get a true RS232 level

translator not a RS485 or other standards).

By convention the driver is the level translator from the 0-2.8V

UART to the RS232 level. The receiver is the translator from the

RS232 level to 0-2.8V UART.

In order to translate the whole set of control lines of the UART

you will need:

• 5 drivers

• 3 receivers

NOTE:

The digital input lines working at 2.8V CMOS have an absolute

maximum input voltage of 3.0V; therefore the level translator IC

shall not be powered by the +3.8V supply of the module. Instead,

it must be powered from a +2.7V / +2.9V (dedicated) power

supply.

This is because in this way the level translator IC outputs on

the module side (i.e. GL865 inputs) will work at +3.8V interface

levels, damaging the module inputs.

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An example of level translation circuitry of this kind is:

The example is done with a MAXIM MAX3237 Transceiver that could

accept supply voltages of 3V DC. Not exceeded with supply voltage

higher then 3.1VDC because this is the higher voltage limit of

module’s inputs.

NOTE:

In this case Vin has to be set with a value compatible with the

logic levels of the module. (Max 3.1V DC)

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Second solution could be done using a MAXIM transceiver (MAX218)

In this case the

compliance with RS232 (+-5V) is possible.

Another level

adapting method could be done using a standard RS232 Transceiver

(MAX3237EAI) adding some resistors to adapt the levels on the

GL865 Input lines.

NOTE: In this case has to be taken in account the length of the

lines on the application to avoid problems in case of High-speed

rates on RS232.

The RS232 serial port lines are usually connected to a DB9

connector with the following layout:

9.3.

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9.4. 5V UART level translation

If the OEM application uses a microcontroller with a serial port

(UART) that works at a voltage different from 2.8 - 3V, then a

circuitry has to be provided to adapt the different levels of

the two set of signals. As for the RS232 translation there are a

multitude of single chip translators. For example a possible

translator circuit for a 5V TRANSMITTER/RECEIVER can be:

TIP:

Note that the TC7SZ07AE has open drain output; therefore the

resistor R2 is mandatory.

NOTE:

The UART input line TXD (rx_uart) of the GL865 is NOT internally

pulled up with a resistor, so there may be the need to place an

external 47KΩ pull-up resistor, either the DTR (dtr_uart) and

RTS (rts_uart) input lines are not pulled up internally, so an

external pull-up resistor of 47KΩ may be required.

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NOTE:

The input lines working at 2.8VCMOS can be pulled-up with 47KΩ

In case of reprogramming of the module has to be considered the

use of the RESET line to start correctly the activity.

The preferable configuration is having an external supply for

the buffer.

NOTE:

In order to avoid a back powering effect it is recommended to

avoid having any HIGH logic level signal applied to the digital

pins of the GL865 when the module is powered OFF or during an

ON/OFF transition.

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10. Audio Section Overview

The Base Band Chip of the GL865 provides one input for audio to be transmitted

(Uplink), that can be connected directly to a microphone or an audio source.

The bias for the microphone is already provided by the product; so the connection can

be done in both following ways:

For more information refer to Telit document : “ 80000NT10007a

Audio Settings Application Note “.

MIC connection

TIP: Since the J-FET transistor inside the microphone acts as

RF-detector-amplifier, ask vendor for a microphone with anti-EMI

220n

MIC/AF_IN+

MIC/AF_IN

AGND

MODULE

INPUT

ADC

Vmic

Wire Or Ground Plane

220n

2.2K

÷10u

MODULE

INPUT

ADC

Vmic

MIC/AF_IN+

MIC/AF_IN-

AGND

Integral Ground Plane

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capacitor (usually a 33pF or a 10pF capacitor placed across the

output terminals inside the case).

LINE-IN connection

If the audio source is not a mike but a different device, the

following connections can be done.

Place a 1Kohm resistor to ground on the negative input, in order

to get balanced the input; than connect the source via 1uF

capacitor, so the DC current is blocked.

Since the input is differential, the common mode voltage noise

between the two (different) ground is rejected, provided that

both AF_IN+ & AF_IN- are connected directly onto the source.

220n

AF_IN+

MIC/AF_IN+

MIC/AF_IN-

AGND

MODULE

INPUT

ADC

Vmic

AF_IN

220n

AF_IN+

MIC/AF_IN+

MIC/AF_IN

AGND

MODULE

INPUTADC

Vmic

Remote_GND

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EAR connection connection

The audio output of the GL865 is balanced, this is helpful to

double the level and to reject common mode (click and pop are

common mode and therefore rejected).

These outputs can drive directly a small loudspeaker with

electrical impedance not lower than 8Ohm.

TIP: in order to get the maximum audio level at a given output

voltage level (dBspl/Vrms), the following breaking through

procedure can be used. Have the loudspeaker as close as you can

to the listener (this simplify also the echo cancelling); choose

the loudspeaker with the higher sensitivity (dBspl per W);

choose loudspeakers with the impedance close to the limit (ex:

16 or 8 Ohm), in order to feed more power inside the transducer

(it increases the W/Vrms ratio). If this were not enough, an

external amplifier should be used.

EAR+

EAR

MODULE

OUTPUT

DAC

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10.1. Electrical Characteristics

10.1.1. Input Lines

Microphone/Line-in path

Line Type Differential

Coupling capacitor ≥ 1µF

Differential input

resistance 1kΩ/2kΩ/2.2kΩ

Levels

To have 0dBm0 @1KHz

(*)

Differential input

voltage

AT#HFMICG=0 290mVrms

AT#HFMICG=1 (+6dB) 145mVrms

AT#HFMICG=2 (+12dB) 72mVrms

AT#HFMICG=3 (+18dB) 36mVrms

AT#HFMICG=4 (+24dB) 18mVrms

AT#HFMICG=5 (+30dB) 9mVrms

AT#HFMICG=6 (+36dB) 4.5mVrms

AT#HFMICG=7 (+42dB) 2.25mVrms

(*) 0 dBm0 in the network are -3.14 dBfs

TIP: The Electrect microphone is internally amplified by a J-

Fet transistor, thus the sound is carried out as saturation

drain current; this means that the norton equivalence has to

be considered. The signal is converted to voltage on the

2.2KOhm resistance, from there on circuitry has to be routed

in order to not pick up common mode noise; beware of the

return path (ground).

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10.1.2. Output Lines

EAR/Line-out Output

Differential line

coupling

Direct connection

=1.3÷1.6V)

Single-ended line

coupling

One EAR terminal

connected via a DC-block

capacitor, the other one

left open

output load resistance ≥ 8 Ω

internal output

resistance

4 Ω (typ.)

signal bandwidth 250÷3400Hz

(@ -3dB with default

filter)

max. differential output

voltage

1120mV

@3.14dBm0 (*)

differential output

voltage

550mV

rms

@0dBm0 (*)

volume increment 2dB per step

volume steps 0..10

(*) in default condition: AT+CLVL=10, AT#HFRECG=0

TIP : We suggest driving the load differentially; this kills all

the common mode noises (click and pop, for example), the output

swing will double (+6dB) and the big output coupling capacitor

will be avoided.

However if particular OEM application needs, also a Single Ended

(S.E)

circuitry can be implemented. The OEM circuitry shall be

designed to reduce the common mode noise typically generated by

the return path of the big currents.

In order to get the maximum power output from the device, the

resistance of the tracks has to be negligible in comparison to

the load.

WARNING. When in Single Ended configuration, the unused output

line must be left open: if this constraint is not respected, the

output stage will be damaged.

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11. General Purpose I/O

The general purpose I/O pads can be configured to act in three

different ways:

• input

• output

• alternate function (

internally controlled

)

Input pads can only be read; they report the digital value (

high

or low

) present on the pad at the read time .

Output pads can only be written or queried and set the value of

the pad output.

An alternate function pad is internally controlled by the GL865

firmware and acts depending on the function implemented.

For Logic levels please refer to chapter 8.

The following table shows the available GPIO on the GL865.

Signal

I/O

Function

Type

Input /

output

current

Default

State

ON_OFF

state

State

during

Reset

Note

42 GPIO_01

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

DVI_WA0

41 GPIO_02

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function JDR

and DVI_RX

40 GPIO_03

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

DVI_TX

39 GPIO_04

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function TX

disable and

DVI_CLK

29 GPIO_05

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

RFTXMON

28 GPIO_06

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

ALARM

27 GPIO_07

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

BUZZER

26 GPIO_08

I/O

Configurable

GPIO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

STAT_LED

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Also the UART ‘s control flow pins can be ubable as GPI/O.

Signal

I/O

unction

Type

Input /

output

current

Default

State

ON_OFF

state

State

during

Reset

Note

1 GPO_A O Configurable

GPO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

C109/DCD

2 GPO_B O Configurable

GPO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

C125/RING

3 GPO_C O Configurable

GPO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

C107/DSR

4 GPI_E I Configurable

GPI

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

C108/DTR

5 GPI_F I Configurable

GPI

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

C105/RTS

6 GPO_D O Configurable

GPO

CMOS

2.8V 1uA/1mA

INPUT 0 0

Alternate

function

C106/CTS

11.1. GPIO Logic levels

Where not specifically stated, all the interface circuits work

at 2.8V CMOS logic levels.

The following table shows the logic level specifications used in

the GL865 interface circuits:

Absolute Maximum Ratings -Not Functional

Parameter Min Max

Input level on any

digital pin

when on (CMOS 2.8)

-0.3V

+3.1V

Input level on any

digital pin

when on (CMOS 1.8)

-0.3V

+2.1V

Input voltage on

analog pins

when on

-0.3V

+3.0V

Operating Range - Interface levels (2.8V CMOS)

Level Min Max

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Input high level

2.1V 3.1V

Input low level 0V 0.5V

Output high

level 2.2V 3.1V

Output low level

0V 0.35V

11.2. Using a GPIO Pad as INPUT

The GPIO pads, when used as inputs, can be connected to a

digital output of another device and report its status, provided

this device has interface levels compatible with the 2.8V CMOS

levels of the GPIO.

If the digital output of the device to be connected with the

GPIO input pad has interface levels different from the 2.8V CMOS,

then it can be buffered with an open collector transistor with a

47K pull up to 2.8V.

NOTE:

In order to avoid a back powering effect it is recommended to

avoid having any HIGH logic level signal applied to the digital

pins of the GL865 when the module is powered OFF or during an

ON/OFF transition.

TIP:

The V_AUX / PWRMON pin can be used for input pull up reference

or/and for ON/OFF monitoring.

11.3. Using a GPIO Pad as OUTPUT

The GPIO pads, when used as outputs, can drive 2.8V CMOS digital

devices or compatible hardware. When set as outputs, the pads

have a push-pull output and therefore the pull-up resistor may

be omitted.

11.4. Using the RFTXMON Output GPIO5

The GPIO5 pin, when configured as RFTXMON Output, is controlled

by the GL865 module and will rise when the transmitter is active

and fall after the transmitter activity is completed.

There are 2 different modes for this function:

1) Active during all the Call:

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For example, if a call is started, the line will be HIGH during

all the conversation and it will be again LOW after hanged up.

The line rises up 300ms before first TX burst and will became

again LOW from 500ms to 1s after last TX burst.

2) Active during all the TX activity:

The GPIO is following the TX bursts

Please refer to the AT User interface manual for additional

information on how to enable this function.

11.5. Using the Alarm Output GPIO6

The GPIO6 pad, when configured as Alarm Output, is controlled by

the GL865 module and will rise when the alarm starts and fall

after the issue of a dedicated AT command.

This output can be used to controlling microcontroller or

application at the alarm time.

11.6. Using the Buzzer Output GPIO7

The GPIO7 pad, when configured as Buzzer Output, is controlled

by the GL865 module and will drive a Buzzer driver with

appropriate square waves.

This permits to your application to easily implement Buzzer

feature with ringing tones or melody played at the call incoming,

tone playing on SMS incoming or simply playing a tone or melody

when needed.

A sample interface scheme is included below to give you an idea

of how to interface a Buzzer to the GPIO7:

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TR1

BCR141W

TR2

SMBT2907A

4,7K

D1N4148 C1

33pF +

+V buzzer

GPIO7

NOTE:

To correctly drive a buzzer a driver must be provided, its

characteristics depend on the Buzzer and for them refer to your

buzzer vendor.

11.7. Magnetic Buzzer Concepts

1.1.1 Short Description

A magnetic Buzzer is a sound-generating device with a coil

located in the magnetic circuit consisting of a permanent magnet,

an iron core, a high permeable metal disk and a vibrating

diaphragm.

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Drawing of the Magnetic Buzzer.

The disk and diaphragm are attracted to the core by the magnetic

field. When an oscillating signal is moved through the coil, it

produces a fluctuating magnetic field which vibrates the

diaphragm at a frequency of the drive signal. Thus the sound is

produced relative to the frequency applied.

Diaphragm movement.

11.7.1. Frequency Behaviour

The frequency behaviour represents the effectiveness of the

reproduction of the applied signals. Because performance is

related to a square driving waveform (whose amplitude varies

from 0V to V

), if you modify the waveform (

e.g. from square to

sinus

) the frequency response will change.

11.7.2. Power Supply Influence

Applying a signal whose amplitude is different from that

suggested by the manufacturer, the performance change following

the rule “if resonance frequency f

increases, amplitude

decreases”.

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Because resonance frequency depends on acoustic design, by

lowering the amplitude of the driving signal the response

bandwidth tends to become narrow, and vice versa.

Summarizing: V

↑  f

↓ V

↓ f

↑

The risk is that the f

could easily fall outside of new

bandwidth; consequently the SPL could be much lower than the

expected.

11.7.3. Working Current Influence

In the component data sheet you will find the value of MAX

CURRENT: this represents the maximum average current that can

flow at nominal voltage without current limitation. In other

words it is not the peak current, which could be twice or three

times higher. If driving circuitry does not support these peak

values, the SPL will never reach the declared level or the

oscillations will stop.

11.8. STAT LED Indication of network service

availability

The STAT_LED pin status shows information on the network service

availability and Call status. In the GL865 modules, the STAT_LED

usually needs an external transistor to drive an external LED.

Therefore, the status indicated in the following table is

reversed with respect to the pin status. The AT command to

enable the function is AT#SLED=2, in order to save the function

use the AT command AT#SLEDSAV, the AT command AT#SLED=0 disable

the function and the functionality of GPIO8 can be used. (see AT

Command user guide)

WARNING:

It is very important to respect the sense of the applied

voltage: never apply to the "-" pin

a voltage more positive than

the "+" pin

: if this happens, the diaphragm vibrates in the

opposite direction with a high pr

obability to be expelled from

its physical position. This damages the device permanently.

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LED status Device Status

Permanently off Device off

Fast blinking

(Period 1s, Ton

0,5s)

Net search / Not

registered / turning

off

Slow blinking

(Period 3s, Ton

0,3s)

Registered full

service

Permanently on a call is active

NOTE:

Don’t use the STAT LED function if the GPIO 8 function is

enabled and vice versa!

A schematic example could be:

11.9. SIMIN

detect function

All the GPIO pins can be used as SIM DETECT input. The AT

Command used to enable the function is:

#SIMINCFG– SIMIN pin configuration SELINT 2

AT#SIMINCFG = <GPIO_

pin> The command enable the function on

the general purpose I/O pin GPIO<pin>

Parameters:

<GPIO_pin> - GPIO pin number;

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supported range is from 1 to 8

(see chapter 11)

AT#SIMINCFG? Read command reports the selected I/O

pin in the format:

#SIMINCFG: 1

AT#SIMINCFG =? Test command reports supported range

of values for parameters in the

format:

#SIMINCFG : (0 – 8)

0 = disabled

Use the AT command AT#SIMDET=2 to enable the SIMIN detection

Use the AT command AT&W0 and AT&P0 to store the SIMIN detection

in the common profile (See AT Command user guide)

NOTE:

Don’t use the SIM IN function on the same pin where the GPIO

function is enabled and vice versa!

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11.10. RTC Bypass out

The VRTC pin brings out the Real Time Clock supply, which is

separate from the rest of the digital part, allowing having only

RTC going on when all the other parts of the device are off.

To this power output a backup battery can be added in order to

increase the RTC autonomy during power off of the main battery

(power supply). NO Devices must be powered from this pin.

11.11. SIM Holder Implementation

Please refer to the related User Guide (SIM Holder Design Guides,

80000NT10001a).

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12. DAC and ADC section

12.1. DAC Converter

12.1.1. Description

The GL865 provides a Digital to Analog Converter. The signal

(named DAC_OUT) is available on pin 15 of the GL865.

The on board DAC is a 10 bit converter, able to generate a

analogue value based a specific input in the range from 0 up to

1023. However, an external low-pass filter is necessary

Min Max Units

Voltage range

(filtered)

0 2,6 Volt

Range 0 1023 Steps

The precision is 10 bits so, if we consider that the maximum

voltage is 2V, the integrated voltage could be calculated with

the following formula:

Integrated output voltage = (2 *value) / 1023

DAC_OUT line must be integrated (for example with a low band

pass filter) in order to obtain an analog voltage.

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12.1.2. Enabling DAC

An AT command is available to use the DAC function.

The command is: AT#DAC= [<enable> [, <value>]]

<value> - scale factor of the integrated output voltage (0..1023

- 10 bit precision)

it must be present if <enable>=1

Refer to SW User Guide or AT Commands Reference Guide for the

full description of this function.

NOTE:

The DAC frequency is selected internally. D/A converter must not

be used during POWERSAVING.

12.1.3. Low Pass Filter Example

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12.2. ADC Converter

12.2.1. Description

The on board A/D are 11-bit converter. They are able to read a

voltage level in the range of 0÷2 volts applied on the ADC pin

input, store and convert it into 11 bit word.

Min Max Units

Input Voltage

range

0 2

Volt

AD conversion

- 11

bits

Resolution

- < 1

The GL865 module provides 2 Analog to Digital Converters.

The input lines are:

ADC_IN1

available on pin 13

ADC_IN2

available on pin 14

12.2.2. Using ADC Converter

An AT command is available to use the ADC function.

The command is AT#ADC=1,2

The read value is expressed in mV

Refer to SW User Guide or AT Commands Reference Guide for the

full description of this function.

12.3. Debug of the GL865 in production

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To test and debug the mounting of the GL865, we strongly

recommend to foreseen test pads on the host PCB, in order to

check the connection between the GL865 itself and the

application and to test the performance of the module connecting

it with an external computer. Depending by the customer

application, these pads include, but are not limited to the

following signals:

pin signal

38, 37 VBATT & VBATT_PA

32, 33, 35, 36,

GND

7 TXD

8 RXD

5 RTS

V_AUX / PWRMON

47 RESET*

45 TXD_AUX

RXD_AUX

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13. Mounting the GL865 on your Board

13.1. General

The GL865 modules have been designed in order to be compliant

with a standard lead-free SMT process.

13.2. Module finishing & dimensions

Lead

free Alloy:

Surface finishing Ni/Au for all solder

pads

Bottom

View

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13.3. Recommended foot print for the application

In order to easily rework the GE865 is suggested to consider on the

application a 1.5 mm placement inhibit area around the module.

It is also suggested, as common rule for an SMT component, to avoid

having a mechanical part of the application in direct contact with

the module.

NOTE: In the customer application, the region under WIRING INHIBIT

(see figure) must be clear from signal or ground paths.

Top View

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13.4. Solder paste

Lead

free

Solder

paste Sn/Ag/Cu

We recommend to use only “no clean” solder paste in order to avoid

the cleaning of the modules after assembly

13.4.1. GL865 Solder reflow

The following is the recommended solder reflow profile

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Profile Feature Pb-Free Assembly

Average ramp-up rate (T

to T

)

3°C/second max

Preheat

– Temperature Min (Tsmin)

– Temperature Max (Tsmax)

–

Time (min to max) (ts)

150°C

200°C

180 seconds

Tsmax to TL

– Ramp-up Rate

3°C/second max

Time maintained above:

– Temperature (TL)

–

Time (tL)

217°C

150 seconds

Peak Temperature (Tp)

245 +0/

5°C

Time within 5°C of actual

Peak

Temperature (tp)

10-30 seconds

Ramp

down Rate

6°C/second max.

Time 25°C to Peak

Temperature

8 minutes max.

NOTE:

All temperatures refer to topside of the package, measured on

the package body surface

WARNING:

The GL865 module withstands one reflow process only.

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14. Packing system

The GL865 modules are packaged on trays of 20 pieces each. This

is especially suitable for the GL865 according to SMT processes

for pick & place movement requirements.

NOTE:

All temperatures refer to topside of the package, measured on

the package body surface

WARNING:

These trays can withstand at the maximum temperature of 65° C.

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14.1. Moisture sensibility

The level of moisture sensibility of GL865 is “3”, in according

with standard IPC/JEDEC J-STD-020, take care all the relatives

requirements for using this kind of components.

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15. Conformity Assessment Issues

The Telit GL865 Module has been assessed in order to satisfy the

essential requirements of the R&TTE Directive 1999/05/EC (Radio

Equipment & Telecommunications Terminal Equipments) to

demonstrate the conformity against the harmonised standards with

the final involvement of a Notified Body.

If the module is installed in conformance to the Telit

installation manuals, no further evaluation under Article 3.2 of

the R&TTE Directive and do not require further involvement of a

R&TTE Directive Notified Body for the final product.

In all other cases, or if the manufacturer of the final product

is in doubt, then the equipment integrating the radio module

must be assessed against Article 3.2 of the R&TTE Directive.

In all cases the assessment of the final product must be made

against the Essential requirements of the R&TTE Directive

Articles 3.1(a) and (b), Safety and EMC respectively, and any

relevant Article 3.3 requirements.

This Hardware User Guide contains all the information you may

need for developing a product meeting the R&TTE Directive.

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16. SAFETY RECOMMANDATIONS

READ CAREFULLY

Be sure the use of this product is allowed in the country and in

the environment required. The use of this product may be

dangerous and has to be avoided in the following areas:

 Where it can interfere with other electronic devices in

environments such as hospitals, airports, aircrafts, etc

 Where there is risk of explosion such as gasoline stations,

oil refineries, etc

It is responsibility of the user to enforce the country

regulation and the specific environment regulation.

Do not disassemble the product; any mark of tampering will

compromise the warranty validity.

We recommend following the instructions of the hardware user

guides for a correct wiring of the product. The product has to

be supplied with a stabilized voltage source and the wiring has

to be conforming to the security and fire prevention regulations.

The product has to be handled with care, avoiding any contact

with the pins because electrostatic discharges may damage the

product itself. Same cautions have to be taken for the SIM,

checking carefully the instruction for its use. Do not insert or

remove the SIM when the product is in power saving mode.

The system integrator is responsible of the functioning of the

final product; therefore, care has to be taken to the external

components of the module, as well as of any project or

installation issue, because the risk of disturbing the GSM

network or external devices or having impact on the security.

Should there be any doubt, please refer to the technical

documentation and the regulations in force.

Every module has to be equipped with a proper antenna with

specific characteristics. The antenna has to be installed with

care in order to avoid any interference with other electronic

devices and has to guarantee a minimum distance from the body

(20 cm). In case of this requirement cannot be satisfied, the

system integrator has to assess the final product against the

SAR regulation.

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The European Community provides some Directives for the

electronic equipments introduced on the market. All the relevant

information’s are available on the European Community website:

http://ec.europa.eu/enterprise/sectors/rtte/documents/

The text of the Directive 99/05 regarding telecommunication

equipments is available, while the applicable Directives (Low

Voltage and EMC) are available at:

http://ec.europa.eu/enterprise/sectors/electrical

FCC Regulatory Requirements

This device complies with Part 15 of the FCC Rules.

Operation is subject to the following two conditions:

(1) this device may not cause harmful interference, and

(2) this device must accept any interference received,

including interference that may cause undesired operation.

RF Exposure:

The antenna(s) used for this transmitter must be installed

to provide a separation distance of at least 20 cm from all

the persons and must not be co-located or operating in

conjunction with any other antenna or transmitter.

The system antenna(s) used for this module must not exceed

1,4dBi (850MHz) and 3.0dBi (1900MHz) for mobile and fixed

or mobile operating configurations.

Users and installers must be provided with antenna

installation instructions and transmitter operating

conditions for satisfying RF exposure compliance.

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IC Regulatory Requirements

This device complies with Industry Canada license-exempt

RSS standard(s). Operation is subject to the following two

conditions:

(1) this device may not cause interference, and

(2) this device must accept any interference, including

interference that may cause undesired operation of the

device.

Le présent appareil est conforme aux CNR d'Industrie Canada

applicables aux appareils radio exempts de licence.

L'exploitation est autorisée aux deux conditions

suivantes :

(1) l'appareil ne doit pas produire de brouillage, et

(2) l'utilisateur de l'appareil doit accepter tout

brouillage radioélectrique subi, même si le brouillage est

susceptible d'en compromettre le fonctionnement.

Under Industry Canada regulations, this radio transmitter

may only operate using an antenna of a type and maximum (or

lesser) gain approved for the transmitter by Industry

Canada. To reduce potential radio interference to other

users, the antenna type and its gain should be so chosen

that the equivalent isotropically radiated power (e.i.r.p.)

is not more than that necessary for successful

communication.

Conformément à la réglementation d'Industrie Canada, le

présent émetteur radio peut fonctionner avec une antenne

d'un type et d'un gain maximal (ou inférieur) approuvé pour

l'émetteur par Industrie Canada. Dans le but de réduire les

risques de brouillage radioélectrique à l'intention des

autres utilisateurs, il faut choisir le type d'antenne et

son gain de sorte que la puissance isotrope rayonnée

équivalente (p.i.r.e.) ne dépasse pas l'intensité

nécessaire à l'établissement d'une communication

satisfaisante.

The GL865-QUAD has been designed to comply with safety

requirements for exposure to radio waves (SAR) in

accordance with RSS-102. Please follow the instructions

included in the user guide for product installation and use.

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This radio transmitter GL865-QUAD has been approved by

Industry Canada to operate with antennas with maximum

permissible gain not exceeding 1,4dBi (850MHz) and 3.0dBi

(1900MHz).

Antenna types having a gain greater than the maximum gain

indicated are strictly prohibited for use with this device.

Le GL865-QUAD a été conçu pour se conformer aux exigences

de sécurité pour l'exposition aux ondes radio (SAR) en

conformité avec RSS-102. S'il vous plaît suivez les

instructions incluses dans le guide utilisateur pour

l'installation du produit et son utilisation.

Cet émetteur radio (numéro de modèle) a été approuvé par

Industrie Canada pour fonctionner avec des antennes avec un

gain maximal admissible de 1.4 dBi (850MHz) et 3.0dBi

(1900MHz).

Types d'antenne ayant un gain supérieur au gain maximal

indiqué est strictement interdit pour une utilisation avec

cet appareil.

Telit Communications S p A GL865Q Quadband GSM/ GPRS Module User Manual 1vv0300910 GL865 Hardware User Guide r1

Telit Communications S.p.A. Quadband GSM/ GPRS Module 1vv0300910 GL865 Hardware User Guide r1

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