u blox TOBYL280 GSM/UMTS/LTE Data Module User Manual TOBY L2 series

u-blox AG GSM/UMTS/LTE Data Module TOBY L2 series

System Integrators Manual

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Document DescriptionSystem Integrators Manual
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Date Submitted2015-07-01 00:00:00
Date Available2015-12-29 00:00:00
Creation Date2015-07-01 16:29:56
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Document Lastmod2015-07-01 16:29:56
Document TitleTOBY-L2 series
Document CreatorMicrosoft® Office Word 2007
Document Author: u-blox AG

TOBY-L2 and MPCI-L2 series
LTE/DC-HSPA+/EGPRS modules
System Integration Manual
Abstract
This document describes the features and the system integration of
TOBY-L2 and MPCI-L2 series multi-mode cellular modules.
These modules are a complete and cost efficient LTE/3G/2G solution
offering up to 150 Mb/s download and 50 Mb/s upload data rates,
covering up to six LTE bands, up to five WCDMA/DC-HSPA+ bands
and four GSM/EGPRS bands in the compact TOBY LGA form factor of
TOBY-L2 modules or in the industry standard PCI Express Mini Card
form factor of MPCI-L2 modules.
www.u-blox.com
UBX-13004618 - R08
TOBY-L2 series
MPCI-L2 series
TOBY-L2 and MPCI-L2 series - System Integration Manual
Document Information
Title
TOBY-L2 and MPCI-L2 series
Subtitle
LTE/DC-HSPA+/EGPRS modules
Document type
System Integration Manual
Document number
UBX-13004618
Revision and date
R08
Document status
Early Production Information
29-Jun-2015
Document status explanation
Objective Specification
Document contains target values. Revised and supplementary data will be published later.
Advance Information
Document contains data based on early testing. Revised and supplementary data will be published later.
Early Production Information
Document contains data from product verification. Revised and supplementary data may be published later.
Production Information
Document contains the final product specification.
This document applies to the following products:
Name
Type number
Modem version
Application version
PCN / IN
TOBY-L200
TOBY-L200-00S-00
TOBY-L200-50S-00
09.71
09.71
A01.15
A01.57
UBX-14044437
UBX-15004131
TOBY-L201
TOBY-L201-01S-00
09.87
A01.01
UBX-15016217
TOBY-L210
TOBY-L210-00S-00
TOBY-L210-50S-00
09.71
09.71
A01.15
A01.57
UBX-14044437
UBX-15004131
TOBY-L280
MPCI-L200
TOBY-L280-00S-00
MPCI-L200-00S-00
09.90
09.71
A01.02
A01.15
UBX-15016802
UBX-14044437
MPCI-L210
MPCI-L210-00S-00
09.71
A01.15
UBX-14044437
u-blox reserves all rights to this document and the information contained herein. Products, names, logos and designs described herein may in
whole or in part be subject to intellectual property rights. Reproduction, use, modification or disclosure to third parties of this document or
any part thereof without the express permission of u-blox is strictly prohibited.
The information contained herein is provided “as is” and u-blox assumes no liability for the use of the information. No warranty, either
express or implied, is given, including but not limited, with respect to the accuracy, correctness, reliability and fitness for a particular purpose
of the information. This document may be revised by u-blox at any time. For most recent documents, please visit www.u-blox.com.
Copyright © 2015, u-blox AG
u-blox® is a registered trademark of u-blox Holding AG in the EU and other countries. PCI, PCI Express, PCIe, and PCI-SIG are trademarks or
registered trademarks of PCI-SIG. Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the
United States and/or other countries. ARM® is a registered trademark of ARM Limited in the EU and other countries. All other registered
trademarks or trademarks mentioned in this document are property of their respective owners.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Preface
u-blox Technical Documentation
As part of our commitment to customer support, u-blox maintains an extensive volume of technical
documentation for our products. In addition to our product-specific technical data sheets, the following manuals
are available to assist u-blox customers in product design and development.

AT Commands Manual: This document provides the description of the AT commands supported by the
u-blox cellular modules.

System Integration Manual: This document provides the description of u-blox cellular modules’ system
from the hardware and the software point of view, it provides hardware design guidelines for the optimal
integration of the cellular modules in the application device and it provides information on how to set up
production and final product tests on application devices integrating the cellular modules.

Application Note: These documents provide guidelines and information on specific hardware and/or
software topics on u-blox cellular modules. See Related documents for a list of Application Notes related to
your Cellular Module.
How to use this Manual
The TOBY-L2 and MPCI-L2 series System Integration Manual provides the necessary information to successfully
design and configure the u-blox cellular modules.
This manual has a modular structure. It is not necessary to read it from the beginning to the end.
The following symbols are used to highlight important information within the manual:
An index finger points out key information pertaining to module integration and performance.
A warning symbol indicates actions that could negatively impact or damage the module.
Questions
If you have any questions about u-blox Cellular Integration:

Read this manual carefully.

Contact our information service on the homepage http://www.u-blox.com/
Technical Support
Worldwide Web
Our website (http://www.u-blox.com/) is a rich pool of information. Product information, technical documents
can be accessed 24h a day.
By E-mail
Contact the closest Technical Support office by email. Use our service pool email addresses rather than any
personal email address of our staff. This makes sure that your request is processed as soon as possible. You will
find the contact details at the end of the document.
Helpful Information when Contacting Technical Support
When contacting Technical Support, have the following information ready:

Module type (TOBY-L200) and firmware version

Module configuration

Clear description of your question or the problem

A short description of the application

Your complete contact details
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Contents
Preface ................................................................................................................................ 3
Contents.............................................................................................................................. 4
System description ....................................................................................................... 8
1.1
1.2
Overview .............................................................................................................................................. 8
Architecture ........................................................................................................................................ 10
1.2.1
Internal blocks ............................................................................................................................. 11
1.3
Pin-out ............................................................................................................................................... 12
1.3.1
TOBY-L2 series pin assignment .................................................................................................... 12
1.3.2
1.4
1.5
MPCI-L2 series pin assignment .................................................................................................... 17
Operating modes ................................................................................................................................ 19
Supply interfaces ................................................................................................................................ 21
1.5.1
Module supply input (VCC or 3.3Vaux) ....................................................................................... 21
1.5.2
1.5.3
RTC supply input/output (V_BCKP) .............................................................................................. 28
Generic digital interfaces supply output (V_INT) ........................................................................... 29
1.6
System function interfaces .................................................................................................................. 30
1.6.1
1.6.2
Module power-on ....................................................................................................................... 30
Module power-off ....................................................................................................................... 32
1.6.3
Module reset ............................................................................................................................... 34
1.6.4
Module configuration selection by host processor ....................................................................... 34
1.7
Antenna interface ............................................................................................................................... 35
1.7.1
Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 35
1.7.2
Antenna detection interface (ANT_DET) ...................................................................................... 38
1.8
SIM interface ...................................................................................................................................... 38
1.8.1
SIM interface ............................................................................................................................... 38
1.8.2
SIM detection interface ............................................................................................................... 38
1.9
Data communication interfaces .......................................................................................................... 39
1.9.1
Universal Serial Bus (USB) ............................................................................................................ 39
1.9.2
1.9.3
Asynchronous serial interface (UART)........................................................................................... 43
DDC (I C) interface ...................................................................................................................... 54
1.9.4
Secure Digital Input Output interface (SDIO) ................................................................................ 55
1.10
Audio .............................................................................................................................................. 55
1.10.1 Digital audio over I S interface ..................................................................................................... 55
1.11
General Purpose Input/Output ........................................................................................................ 56
1.12
1.13
Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) .................................................................. 57
Reserved pins (RSVD) ...................................................................................................................... 57
1.14
Not connected pins (NC) ................................................................................................................. 57
1.15
System features............................................................................................................................... 58
1.15.1 Network indication ...................................................................................................................... 58
1.15.2
Antenna supervisor ..................................................................................................................... 58
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1.15.3
1.15.4
Jamming detection ...................................................................................................................... 58
IP modes of operation ................................................................................................................. 59
1.15.5
Dual stack IPv4/IPv6 ..................................................................................................................... 59
1.15.6
1.15.7
TCP/IP and UDP/IP ....................................................................................................................... 59
FTP .............................................................................................................................................. 59
1.15.8
HTTP ........................................................................................................................................... 60
1.15.9 SSL .............................................................................................................................................. 60
1.15.10
AssistNow clients and GNSS integration ................................................................................... 60
®
1.15.11
Hybrid positioning and CellLocate .......................................................................................... 60
1.15.12
1.15.13
Wi-Fi integration ...................................................................................................................... 63
Firmware update Over AT (FOAT)............................................................................................. 63
1.15.14
Firmware update Over The Air (FOTA) ...................................................................................... 63
1.15.15
1.15.16
In-band Modem (eCall / ERA-GLONASS) .................................................................................. 64
SIM Access Profile (SAP) ........................................................................................................... 64
1.15.17
Smart temperature management ............................................................................................. 66
1.15.18
Power saving ........................................................................................................................... 68
Design-in ..................................................................................................................... 69
2.1
Overview ............................................................................................................................................ 69
2.2
Supply interfaces ................................................................................................................................ 70
2.2.1
Module supply (VCC or 3.3Vaux)................................................................................................. 70
2.2.2
RTC supply output (V_BCKP) ....................................................................................................... 82
2.2.3
Generic digital interfaces supply output (V_INT) ........................................................................... 84
2.3
System functions interfaces ................................................................................................................ 85
2.3.1
Module power-on (PWR_ON) ...................................................................................................... 85
2.3.2
2.3.3
Module reset (RESET_N or PERST#) .............................................................................................. 86
Module configuration selection by host processor ....................................................................... 87
2.4
Antenna interface ............................................................................................................................... 88
2.4.1
2.4.2
2.5
SIM interface ...................................................................................................................................... 98
2.5.1
2.5.2
2.6
Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 88
Antenna detection interface (ANT_DET) ...................................................................................... 96
Guidelines for SIM circuit design.................................................................................................. 98
Guidelines for SIM layout design ............................................................................................... 104
Data communication interfaces ........................................................................................................ 105
2.6.1
2.6.2
Universal Serial Bus (USB) .......................................................................................................... 105
Asynchronous serial interface (UART)......................................................................................... 107
2.6.3
DDC (I C) interface .................................................................................................................... 111
2.6.4
Secure Digital Input Output interface (SDIO) .............................................................................. 115
2.7
Audio interface ................................................................................................................................. 117
2.7.1
2.8
2.9
Digital audio interface ............................................................................................................... 117
General Purpose Input/Output .......................................................................................................... 119
Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) .................................................................... 120
2.10
Reserved pins (RSVD) .................................................................................................................... 121
2.11
Module placement ........................................................................................................................ 122
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2.12
2.13
TOBY-L2 series module footprint and paste mask ......................................................................... 123
MPCI-L2 series module installation ................................................................................................ 124
2.14
Thermal guidelines ........................................................................................................................ 126
2.15
ESD guidelines .............................................................................................................................. 127
2.15.1 ESD immunity test overview ...................................................................................................... 127
2.15.2
ESD immunity test of TOBY-L2 and MPCI-L2 series reference designs ........................................ 128
2.15.3 ESD application circuits .............................................................................................................. 128
2.16
Schematic for TOBY-L2 and MPCI-L2 series module integration .................................................... 130
2.16.1
Schematic for TOBY-L200-00S / TOBY-L210-00S ....................................................................... 130
2.16.2
2.16.3
Schematic for TOBY-L201-01S / TOBY-L280-00S ....................................................................... 131
Schematic for TOBY-L200-50S / TOBY-L210-50S ....................................................................... 132
2.16.4
Schematic for MPCI-L2 series..................................................................................................... 133
2.17
Design-in checklist ........................................................................................................................ 134
2.17.1 Schematic checklist ................................................................................................................... 134
2.17.2
Layout checklist ......................................................................................................................... 135
2.17.3
Antenna checklist ...................................................................................................................... 135
Handling and soldering ........................................................................................... 136
3.1
Packaging, shipping, storage and moisture preconditioning ............................................................. 136
3.2
3.3
Handling ........................................................................................................................................... 136
Soldering .......................................................................................................................................... 137
3.3.1
Soldering paste.......................................................................................................................... 137
3.3.2
3.3.3
Reflow soldering ....................................................................................................................... 137
Optical inspection ...................................................................................................................... 138
3.3.4
Cleaning.................................................................................................................................... 138
3.3.5
3.3.6
Repeated reflow soldering ......................................................................................................... 139
Wave soldering.......................................................................................................................... 139
3.3.7
Hand soldering .......................................................................................................................... 139
3.3.8
3.3.9
Rework...................................................................................................................................... 139
Conformal coating .................................................................................................................... 139
3.3.10
Casting...................................................................................................................................... 139
3.3.11
3.3.12
Grounding metal covers ............................................................................................................ 139
Use of ultrasonic processes ........................................................................................................ 139
Approvals.................................................................................................................. 140
4.1
Product certification approval overview ............................................................................................. 140
4.2
Federal Communications Commission notice .................................................................................... 141
4.2.1
4.2.2
Safety warnings review the structure ......................................................................................... 141
Declaration of Conformity ......................................................................................................... 141
4.2.3
Modifications ............................................................................................................................ 142
4.3
Industry Canada notice ..................................................................................................................... 142
4.3.1
Declaration of Conformity ......................................................................................................... 143
4.3.2
4.4
4.5
Modifications ............................................................................................................................ 143
Anatel certification ........................................................................................................................... 144
R&TTED and European Conformance CE mark ................................................................................. 145
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Product testing ......................................................................................................... 146
5.1
u-blox in-series production test ......................................................................................................... 146
5.2
Test parameters for OEM manufacturer ............................................................................................ 147
5.2.1
5.2.2
“Go/No go” tests for integrated devices .................................................................................... 147
RF functional tests ..................................................................................................................... 147
Appendix ........................................................................................................................ 149
A Glossary .................................................................................................................... 149
Migration between TOBY-L1 and TOBY-L2 ............................................................ 151
B.1
B.2
Overview .......................................................................................................................................... 151
Pin-out comparison between TOBY-L1 and TOBY-L2 ........................................................................ 153
B.3
Schematic for TOBY-L1 and TOBY-L2 integration .............................................................................. 155
Related documents......................................................................................................... 156
Revision history .............................................................................................................. 157
Contact ............................................................................................................................ 158
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TOBY-L2 and MPCI-L2 series - System Integration Manual
1 System description
1.1
Overview
TOBY-L2 and MPCI-L2 series comprises LTE/3G/2G multi-mode modules supporting up to six LTE bands, up to
five UMTS/DC-HSPA+ bands and up to four GSM/(E)GPRS bands for voice and/or data transmission as following:

TOBY-L200, TOBY-L201 and MPCI-L200 are designed primarily for operation in America

TOBY-L210 and MPCI-L210 are designed primarily for operation in Europe, Asia and other countries

TOBY-L280 is mainly designed for operation in Asia and Oceania
TOBY-L2 and MPCI-L2 series are designed in two different form-factors suitable for applications as following:

TOBY-L2 modules are designed in the small TOBY 152-pin Land Grid Array form-factor (35.6 x 24.8 mm),
easy to integrate in compact designs and form-factor compatible with the u-blox cellular module families:
this allows customers to take the maximum advantage of their hardware and software investments, and
provides very short time-to-market.

MPCI-L2 modules are designed in the industry standard PCI Express Full-Mini Card form-factor (51 x 30 mm)
easy to integrate into industrial and consumer applications and also ideal for manufacturing of small series.
With LTE Category 4 data rates at up to 150 Mb/s (down-link) and 50 Mb/s (up-link), the TOBY-L2 and MPCI-L2
series modules are ideal for applications requiring the highest data-rates and high-speed internet access.
Table 1 summarizes the TOBY-L2 and MPCI-L2 series main features and interfaces.
Antenna supervisor
MIMO 2x2 / Rx Diversity
Jamming detection
Embedded TCP/UDP stack
Embedded HTTP,FTP
FOTA
eCall / ERA GLONASS
Dual stack IPv4/IPv6
□
●
●
2,4,5
24 6 850/1900
13,17
●
●
●
●
●
●
●
●
TOBY-L210 4
1,3,5
850/900
24 6
12 Quad
7,8,20
1900/2100
○
●
○
□
●
●
TOBY-L280 4
1,3,5,
850/900
24 6
12 Quad
7,8,28
1900/2100
●
●
●
●
●
MPCI-L200 4
2,4,5
24 6
7,17
850/900
AWS
12 Quad
1900/2100
●
●
●
●
MPCI-L210 4
1,3,5
850/900
24 6
12 Quad
7,8,20
1900/2100
●
●
●
●
TOBY-L201 4
● = supported by all product versions
○ = supported by product version “50” and future product versions
□ = supported by all product versions except product version “50”
F = supported by future product versions
Table 1: TOBY-L2 and MPCI-L2 series main features summary
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Automotive
Network indication
Professional
Digital audio
Analog audio
GPIOs
850/900
AWS
12 Quad
1900/2100
GNSS receiver
○
2,4,5
24 6
7,17
Bands
●
TOBY-L200 4
Bands
○
HSUPA category
HSDPA category
Bands
LTE FDD category
DCC (I2C)
Grade
SDIO (Master)
Features
USB 2.0
Audio
UART
Interfaces
CellLocate®
Positioning
Standard
GSM
Assist Now Software
UMTS
GNSS via modem
LTE
GPRS/EDGE multi-slot class
Module
TOBY-L2 and MPCI-L2 series - System Integration Manual
Table 2 reports a summary of cellular radio access technologies characteristics and features of the modules.
4G LTE
3G UMTS/HSDPA/HSUPA
2G GSM/GPRS/EDGE
3GPP Release 9
Long Term Evolution (LTE)
Evolved Uni.Terrestrial Radio Access (E-UTRA)
Frequency Division Duplex (FDD)
DL Multi-Input Multi-Output (MIMO) 2 x 2
3GPP Release 8
Dual-Cell HS Packet Access (DC-HSPA+)
UMTS Terrestrial Radio Access (UTRA)
Frequency Division Duplex (FDD)
DL Rx diversity
3GPP Release 8
Enhanced Data rate GSM Evolution (EDGE)
GSM EGPRS Radio Access (GERA)
Time Division Multiple Access (TDMA)
DL Advanced Rx Performance (DARP) Phase 1
Band support:

TOBY-L200:

Band 17 (700 MHz)

Band 5 (850 MHz)

Band 4 (AWS, i.e. 1700 MHz)

Band 2 (1900 MHz)

Band 7 (2600 MHz)

TOBY-L201:

Band 17 (700 MHz)

Band 13 (750 MHz)

Band 5 (850 MHz)

Band 4 (AWS, i.e. 1700 MHz)

Band 2 (1900 MHz)

TOBY-L210:

Band 20 (800 MHz)

Band 5 (850 MHz)

Band 8 (900 MHz)

Band 3 (1800 MHz)

Band 1 (2100 MHz)

Band 7 (2600 MHz)

TOBY-L280:

Band 28 (750 MHz)

Band 5 (850 MHz)

Band 8 (900 MHz)

Band 3 (1800 MHz)

Band 1 (2100 MHz)

Band 7 (2600 MHz)
Band support:

TOBY-L200:

Band 5 (850 MHz)

Band 8 (900 MHz)

Band 4 (AWS, i.e. 1700 MHz)

Band 2 (1900 MHz)

Band 1 (2100 MHz)

TOBY-L201:

Band 5 (850 MHz)

Band 2 (1900 MHz)
Band support

TOBY-L200:

GSM 850 MHz

E-GSM 900 MHz

DCS 1800 MHz

PCS 1900 MHz

TOBY-L210:

Band 5 (850 MHz)

Band 8 (900 MHz)

Band 2 (1900 MHz)

Band 1 (2100 MHz)

TOBY-L210:

GSM 850 MHz

E-GSM 900 MHz

DCS 1800 MHz

PCS 1900 MHz

TOBY-L280:

Band 5 (850 MHz)

Band 8 (900 MHz)

Band 2 (1900 MHz)

Band 1 (2100 MHz)

TOBY-L280:

GSM 850 MHz

E-GSM 900 MHz

DCS 1800 MHz

PCS 1900 MHz
LTE Power Class

Power Class 3 (23 dBm)
for LTE mode
WCDMA/HSDPA/HSUPA Power Class

Power Class 3 (24 dBm)
for UMTS/HSDPA/HSUPA mode
GSM/GPRS (GMSK) Power Class

Power Class 4 (33 dBm)
for GSM/E-GSM bands

Power Class 1 (30 dBm)
for DCS/PCS bands
EDGE (8-PSK) Power Class

Power Class E2 (27 dBm)
for GSM/E-GSM bands

Power Class E2 (26 dBm)
for DCS/PCS bands
Data rate

LTE category 4:
up to 150 Mb/s DL, 50 Mb/s UL
Data rate

TOBY-L200 / MPCI-L200:

HSDPA cat.14, up to 21 Mb/s DL1

HSUPA cat.6, up to 5.6 Mb/s UL

TOBY-L210 / MPCI-L210:

HSDPA cat.24, up to 42 Mb/s DL

HSUPA cat.6, up to 5.6 Mb/s UL
Data rate2

GPRS multi-slot class 123, CS1-CS4,
up to 85.6 kb/s DL/UL

EDGE multi-slot class 123, MCS1-MCS9
up to 236.8 kb/s DL/UL
Table 2: TOBY-L2 and MPCI-L2 series LTE, 3G and 2G characteristics summary
HSDPA category 24 capable
GPRS/EDGE multi-slot class determines the number of timeslots available for upload and download and thus the speed at which data can
be transmitted and received, with higher classes typically allowing faster data transfer rates.
GPRS/EDGE multi-slot class 12 implies a maximum of 4 slots in DL (reception) and 4 slots in UL (transmission) with 5 slots in total.
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1.2
Architecture
Figure 1 summarizes the internal architecture of TOBY-L2 series modules.
Duplexer
ANT1
Switch
Filters
Filters
LNAs
Filters
ANT_DET
SIM
26 MHz
DDC(I2C)
PAs
Filters
LNAs
Filters
Filters
LNAs
Filters
Filters
LNAs
Filters
Duplexer
Filters
ANT2
PAs
SDIO
RF
Transceiver
UART
Memory
Cellular
Base-band
Processor
Switch
USB
GPIO
Digital audio (I2S)
32.768 kHz
Host Select
VCC (Supply)
Power On
V_BCKP (RTC)
Power Management Unit
External Reset
V_INT (I/O)
Figure 1: TOBY-L2 series block diagram
As described in the Figure 2, each MPCI-L2 series module integrates one TOBY-L2 series module:

The MPCI-L200 integrates a TOBY-L200 module

The MPCI-L210 integrates a TOBY-L210 module
The TOBY-L2 module represents the core of the device, providing the related LTE/3G/2G modem and processing
functionalities. Additional signal conditioning circuitry is implemented for PCI Express Mini Card compliance, and
two UF.L connectors are available for easy antenna integration.
PERST#
U.FL
Signal
Conditioning
ANT1
TOBY-L2
series
U.FL
LED_WWAN#
W_DISABLE#
SIM
ANT2
USB
VCC
Boost
Converter
3.3Vaux (Supply)
Figure 2: MPCI-L2 series block diagram
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1.2.1 Internal blocks
As described in Figure 2, each MPCI-L2 series module integrates one TOBY-L2 series module, which consists of
the following internal sections: RF, baseband and power management.
RF section
The RF section is composed of RF transceiver, PAs, LNAs, crystal oscillator, filters, duplexers and RF switches.
Tx signal is pre-amplified by RF transceiver, then output to the primary antenna input/output port (ANT1) of the
module via power amplifier (PA), SAW band pass filters band, specific duplexer and antenna switch.
Dual receiving paths are implemented according to LTE Down-Link MIMO 2 x 2 and 3G Receiver Diversity radio
technologies supported by the modules as LTE category 4 and HSDPA category 24 User Equipments: incoming
signals are received through the primary (ANT1) and the secondary (ANT2) antenna input ports which are
connected to the RF transceiver via specific antenna switch, diplexer, duplexer, LNA, SAW band pass filters.

RF transceiver performs modulation, up-conversion of the baseband I/Q signals for Tx, down-conversion and
demodulation of the dual RF signals for Rx. The RF transceiver contains:
Automatically gain controlled direct conversion Zero-IF receiver,
Highly linear RF demodulator / modulator capable GMSK, 8-PSK, QPSK, 16-QAM, 64-QAM,
Fractional-N Sigma-Delta RF synthesizer,
VCO.

Power Amplifiers (PA) amplify the Tx signal modulated by the RF transceiver

RF switches connect primary (ANT1) and secondary (ANT2) antenna ports to the suitable Tx / Rx path

Low Noise Amplifiers (LNA) enhance the received sensitivity

SAW duplexers separate the Tx and Rx signal paths and provide RF filtering

SAW band pass filters enhance the rejection of out-of-band signals

26 MHz crystal oscillator generates the clock reference in active-mode or connected-mode.
Baseband and power management section
The Baseband and Power Management section is composed of the following main elements:

A mixed signal ASIC, which integrates
Microprocessor for control functions
DSP core for LTE/3G/2G Layer 1 and digital processing of Rx and Tx signal paths
Memory interface controller
Dedicated peripheral blocks for control of the USB, SIM and GPIO digital interfaces
Analog front end interfaces to RF transceiver ASIC

Memory system, which includes NAND flash and LPDDR

Voltage regulators to derive all the subsystem supply voltages from the module supply input VCC

Voltage sources for external use: V_BCKP and V_INT (not available on MPCI-L2 series modules)

Hardware power on

Hardware reset

Low power idle-mode support

32.768 kHz crystal oscillator to provide the clock reference in the low power idle-mode, which can be set by
enable power saving configuration using the AT+UPSV command.
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1.3
Pin-out
1.3.1 TOBY-L2 series pin assignment
Table 3 lists the pin-out of the TOBY-L2 series modules, with pins grouped by function.
Function
Pin Name
Pin No
I/O
Description
Remarks
Power
VCC
70,71,72
Module supply input
VCC pins are internally connected each other.
VCC supply circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.5.1 for functional description and
requirements for the VCC module supply.
See section 2.2.1 for external circuit design-in.
GND
2, 30, 32, 44, N/A
46, 69, 73, 74,
76, 78, 79, 80,
82, 83, 85, 86,
88-90, 92-152
Ground
GND pins are internally connected each other.
External ground connection affects the RF and thermal
performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
V_BCKP
I/O
RTC supply
input/output
V_BCKP = 3.0 V (typical) generated by internal regulator
when valid VCC supply is present.
See section 1.5.2 for functional description.
See section 2.2.2 for external circuit design-in.
V_INT
Generic digital
interfaces supply
output
V_INT = 1.8 V (typical) generated by internal regulator
when the module is switched on.
See section 1.5.3 for functional description.
See section 2.2.3 for external circuit design-in.
PWR_ON
20
Power-on input
Internal active pull-up to the VCC enabled.
See section 1.6.1 for functional description.
See section 2.3.1 for external circuit design-in.
RESET_N
23
External reset input
Internal active pull-up to the VCC enabled.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
HOST_SELECT0
26
Selection of module
configuration by the
host processor
Note: Not supported by “00”, “01”, “50” product versions.
See section 1.6.4 for functional description.
See section 2.3.3 for external circuit design-in.
HOST_SELECT1
62
Selection of module
configuration by the
host processor
Note: Not supported by “00”, “01”, “50” product versions.
See section 1.6.4 for functional description.
See section 2.3.3 for external circuit design-in.
ANT1
81
I/O
Primary antenna
Main Tx / Rx antenna interface.
50  nominal characteristic impedance.
Antenna circuit affects the RF performance and application
device compliance with required certification schemes.
See section 1.7 for functional description / requirements.
See section 2.4 for external circuit design-in.
ANT2
87
Secondary antenna
Rx only for MIMO 2x2 and Rx diversity.
50  nominal characteristic impedance.
Antenna circuit affects the RF performance and application
device compliance with required certification schemes.
See section 1.7 for functional description / requirements
See section 2.4 for external circuit design-in.
ANT_DET
75
Antenna detection
Note: not supported by “00”, “01”, “50” product versions.
See section 1.7.2 for functional description.
See section 2.4.2 for external circuit design-in.
System
Antennas
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Function
Pin Name
Pin No
I/O
Description
Remarks
SIM
VSIM
59
SIM supply output
VSIM = 1.8 V / 3 V output as per the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_IO
57
I/O
SIM data
Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k pull-up to VSIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_CLK
56
SIM clock
3.25 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_RST
58
SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
VUSB_DET
USB detect input
Note: leave unconnected, as VBUS detect is not supported.
Input for VBUS (5 V typical) USB supply sense.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D-
27
I/O
USB Data Line D-
USB interface for AT commands, data communication,
FOAT, FW update by u-blox EasyFlash tool and diagnostic.
90  nominal differential impedance (Z0)
30  nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and external series resistors as
required by the USB 2.0 specifications [4] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D+
28
I/O
USB Data Line D+
USB interface for AT commands, data communication,
FOAT, FW update by u-blox EasyFlash tool and diagnostic.
90  nominal differential impedance (Z0)
30  nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and external series resistors as
required by the USB 2.0 specifications [4] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB
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Function
Pin Name
Pin No
I/O
Description
Remarks
UART
RXD
17
UART data output
Note: not supported by TOBY-L200-00S, TOBY-L210-00S.
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
for AT command, data communication, FOAT.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
TXD
16
UART data input
Note: not supported by TOBY-L200-00S, TOBY-L210-00S.
1.8 V input, Circuit 103 (TXD) in ITU-T V.24,
for AT command, data communication, FOAT.
Internal active pull-up to V_INT.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
CTS
15
UART clear to send
output
Note: not supported by TOBY-L200-00S, TOBY-L210-00S.
1.8 V output, Circuit 106 (CTS) in ITU-T V.24.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
RTS
14
UART ready to send
input
Note: not supported by TOBY-L200-00S, TOBY-L210-00S.
1.8 V input, Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
DSR
10
O/
I/O
UART data set ready
output / GPIO
Note: UART DSR not supported by TOBY-L200-00S,
TOBY-L210-00S, TOBY-L200-50S, TOBY-L210-50S;
GPIO not supported by “00”, “01”, “50” product versions.
1.8 V, Circuit 107 in ITU-T V.24, configurable as GPIO.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
RI
11
O/
I/O
UART ring indicator
output / GPIO
Note: RI not supported by TOBY-L200-00S, TOBY-L210-00S;
GPIO not supported by “00”, “01”, “50” product versions.
1.8 V, Circuit 125 in ITU-T V.24, configurable as GPIO.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
DTR
13
I/
I/O
UART data terminal
ready input / GPIO
Note: UART DTR not supported by TOBY-L200-00S,
TOBY-L210-00S, TOBY-L200-50S, TOBY-L210-50S;
GPIO not supported by “00”, “01”, “50” product versions.
1.8 V, Circuit 108/2 in ITU-T V.24, configurable as GPIO.
Internal active pull-up to V_INT when configured as DTR.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
DCD
12
O/
I/O
UART data carrier
detect output / GPIO
Note: UART DCD not supported by TOBY-L200-00S,
TOBY-L210-00S, TOBY-L200-50S, TOBY-L210-50S;
GPIO not supported by “00”, “01”, “50” product versions.
1.8 V, Circuit 109 in ITU-T V.24, configurable as GPIO.
Add Test-Point and series 0  to access for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
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Function
DDC
SDIO
Audio
Pin Name
Pin No
I/O
Description
Remarks
SCL
54
I C bus clock line
Note: not supported by “00”, “01”, “50” product versions.
1.8 V open drain, for communication with u-blox GNSS
receivers and other I2C-slave devices as an audio codec.
External pull-up required.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
SDA
55
I/O
I2C bus data line
Note: not supported by “00”, “01”, “50” product versions.
1.8 V open drain, for communication with u-blox GNSS
receivers and other I2C-slave devices as an audio codec.
External pull-up required.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
SDIO_D0
66
I/O
SDIO serial data [0]
Note: not supported by “00”, “01” product versions.
SDIO interface for communication with external Wi-Fi chip
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_D1
68
I/O
SDIO serial data [1]
Note: not supported by “00”, “01” product versions.
SDIO interface for communication with external Wi-Fi chip
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_D2
63
I/O
SDIO serial data [2]
Note: not supported by “00”, “01” product versions.
SDIO interface for communication with external Wi-Fi chip
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_D3
67
I/O
SDIO serial data [3]
Note: not supported by “00”, “01” product versions.
SDIO interface for communication with external Wi-Fi chip
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_CLK
64
SDIO serial clock
Note: not supported by “00”, “01” product versions.
SDIO interface for communication with external Wi-Fi chip
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_CMD
65
I/O
SDIO command
Note: not supported by “00”, “01” product versions.
SDIO interface for communication with external Wi-Fi chip
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
I2S_TXD
51
O/
I/O
I2S transmit data /
GPIO
Note: not supported by “00”, “01”, “50” product versions.
I2S transmit data output, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I2S_RXD
53
I/
I/O
I2S receive data /
GPIO
Note: not supported by “00”, “01”, “50” product versions.
I2S receive data input, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I2S_CLK
52
I/O /
I/O
I2S clock /
GPIO
Note: not supported by “00”, “01”, “50” product versions.
I2S serial clock, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I2S_WA
50
I/O /
I/O
I2S word alignment /
GPIO
Note: not supported by “00”, “01”, “50” product versions.
I2S word alignment, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
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Function
Pin Name
Pin No
I/O
Description
Remarks
GPIO
GPIO1
21
I/O
GPIO
Note: not supported by “00”, “01”, “50” product versions.
WWAN status indication set on “00”, “01” product versions.
Wi-Fi enable function set on “50” product version.
1.8 V GPIO with alternatively configurable functions
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO2
22
I/O
GPIO
Note: not supported by “00”, “01”, “50” product versions.
1.8 V GPIO with alternatively configurable functions
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO3
24
I/O
GPIO
Note: not supported by “00”, “01”, “50” product versions.
1.8 V GPIO with alternatively configurable functions
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO4
25
I/O
GPIO
Note: not supported by “00”, “01”, “50” product versions.
1.8 V GPIO with alternatively configurable functions
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO5
60
I/O
GPIO
Note: not supported by “00”, “01”, “50” product versions.
1.8 V GPIO with alternatively configurable functions
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO6
61
I/O
GPIO
Note: not supported by “00”, “01”, “50” product versions.
1.8 V GPIO with alternatively configurable functions
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
RSVD
N/A
Reserved pin
This pin must be connected to ground.
See section 2.10
RSVD
1, 7-9, 18,
19, 29, 31,
33-43, 45,
47-49, 77,
84, 91
N/A
Reserved pin
Leave unconnected.
See section 2.10
Reserved
Table 3: TOBY-L2 series module pin definition, grouped by function
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1.3.2 MPCI-L2 series pin assignment
Table 4 lists the pin-out of the MPCI-L2 series modules, with pins grouped by function.
Function
Pin Name
Pin No
I/O
Description
Remarks
Power
3.3Vaux
2, 24, 39,
41, 52
Module supply input
3.3Vaux pins are internally connected each other.
3.3Vaux supply circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.5.1 for functional description and
requirements for the 3.3Vaux module supply.
See section 2.2.1 for external circuit design-in.
GND
4, 9, 15, 18,
21, 26, 27,
29, 34, 35,
37, 40, 43, 50
N/A
Ground
GND pins are internally connected each other.
External ground connection affects the RF and thermal
performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
Auxiliary
Signals
PERST#
22
External reset input
Internal 45 k pull-up to 3.3 V supply.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
Antennas
ANT1
U.FL
I/O
Primary antenna
Main Tx / Rx antenna interface.
50  nominal characteristic impedance.
Antenna circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.7 for functional description / requirements.
See section 2.4 for external circuit design-in.
ANT2
U.FL
Secondary antenna
Rx only for MIMO 2x2 and Rx diversity.
50  nominal characteristic impedance.
Antenna circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.7 for functional description / requirements
See section 2.4 for external circuit design-in.
UIM_PWR
SIM supply output
UIM_PWR = 1.8 V / 3 V automatically generated
according to the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_DATA
10
I/O
SIM data
Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k pull-up to UIM_PWR.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_CLK
12
SIM clock
3.25 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_RESET
14
SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM
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Function
Pin Name
Pin No
I/O
Description
Remarks
USB
USB_D-
36
I/O
USB Data Line D-
USB interface for AT commands, data communication,
FOAT, FW update by u-blox EasyFlash tool and diagnostic.
90  nominal differential impedance (Z0)
30  nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and external series resistors
as required by the USB 2.0 specifications [4] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D+
38
I/O
USB Data Line D+
USB interface for AT commands, data communication,
FOAT, FW update by u-blox EasyFlash tool and diagnostic.
90  nominal differential impedance (Z0)
30  nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and external series resistors
as required by the USB 2.0 specifications [4] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
LED_WWAN#
42
LED indicator output
Open drain active low output.
See section 1.12 for functional description.
See section 2.9 for external circuit design-in.
W_DISABLE#
20
Wireless radio
disable input
Internal 22 k pull-up to 3.3Vaux.
See section 1.12 for functional description.
See section 2.9 for external circuit design-in.
NC
1, 3, 5-7, 11,
N/A
13, 16, 17, 19,
23, 25, 28,
30-33, 44-46,
47-49, 51
Not connected
Internally not connected.
See section 1.14 for the description.
Specific
Signals
Not
Connected
Table 4: MPCI-L2 series module pin definition, grouped by function
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1.4
Operating modes
TOBY-L2 and MPCI-L2 series modules have several operating modes. The operating modes are defined in Table 5
and described in detail in Table 6, providing general guidelines for operation.
General Status
Operating Mode
Definition
Power-down
Not-Powered Mode
Power-Off Mode
VCC or 3.3Vaux supply not present or below operating range: module is switched off.
VCC or 3.3Vaux supply within operating range and module is switched off.
Normal Operation
Idle-Mode
Active-Mode
Module processor core runs with 32 kHz reference generated by the internal oscillator.
Module processor core runs with 26 MHz reference generated by the internal oscillator.
Connected-Mode
RF Tx/Rx data connection enabled and processor core runs with 26 MHz reference.
Table 5: TOBY-L2 and MPCI-L2 series modules operating modes definition
Operating Mode
Description
Transition between operating modes
Not-Powered Mode
Module is switched off.
Application interfaces are not accessible.
Power-Off Mode
Module is switched off: normal shutdown by an
appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
MPCI-L2 modules do not support Power-Off Mode
but halt mode (see 1.6.2 and u-blox AT Commands
Manual [3], AT+CFUN=127 command).
When VCC or 3.3Vaux supply is removed, the modules
enter not-powered mode.
When in not-powered mode, TOBY-L2 modules cannot be
switched on by PWR_ON, RESET_N or RTC alarm and
enter active-mode after applying VCC supply (see 1.6.1).
When in not-powered mode, MPCI-L2 modules cannot be
switched on by RTC alarm and enter active-mode after
applying 3.3Vaux supply (see 1.6.1).
When the modules are switched off by an appropriate
power-off event (see 1.6.2), the modules enter power-off
mode from active-mode.
When in power-off mode, TOBY-L2 modules can be
switched on by PWR_ON, RESET_N or an RTC alarm.
When in power-off mode, TOBY-L2 modules enter the
not-powered mode after removing VCC supply.
Idle-Mode
Module is switched on with application interfaces
disabled or suspended: the module is temporarily not
ready to communicate with an external device by
means of the application interfaces as configured to
reduce the current consumption.
The module enters the low power idle-mode
whenever possible if power saving is enabled by
AT+UPSV (see u-blox AT Commands Manual [3])
reducing current consumption (see 1.5.1.5).
With HW flow control enabled and AT+UPSV=1 or
AT+UPSV=3, the UART CTS line indicates when the
UART is enabled (see 1.9.2.3, 1.9.2.4).
With HW flow control disabled, the UART CTS line is
fixed to ON state (see 1.9.2.3).
Power saving configuration is not enabled by default:
it can be enabled by the AT+UPSV command (see
the u-blox AT Commands Manual [3]).
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The modules automatically switch from active-mode to low
power idle-mode whenever possible if power saving is
enabled (see sections 1.5.1.5, 1.9.1.4, 1.9.2.4 and u-blox
AT Commands Manual [3], AT+UPSV).
The modules wake up from idle-mode to active-mode in
the following events:

Automatic periodic monitoring of the paging channel
for the paging block reception according to network
conditions (see 1.5.1.5)

The connected USB host forces a remote wakeup of
the module as USB device (see 1.9.1.4)

Automatic periodic enable of the UART interface to
receive / send data, with AT+UPSV=1 (see 1.9.2.4)

Data received on UART interface, with HW flow
control disabled and AT+UPSV=1 (see 1.9.2.4)

RTS input set ON by the host DTE, with HW flow
control disabled and AT+UPSV=2 (see 1.9.2.4)

DTR input set ON by the host DTE, with AT+UPSV=3
(see 1.9.2.4)

The connected SDIO device forces a wakeup of the
module as SDIO host (see 1.9.4)

A preset RTC alarm occurs (see u-blox AT Commands
Manual [3], AT+CALA)
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Operating Mode
Description
Transition between operating modes
Active-Mode
Module is switched on with application interfaces
enabled or not suspended: the module is ready to
communicate with an external device by means of
the application interfaces unless power saving
configuration is enabled by AT+UPSV (see 1.9.1.4,
1.9.2.4 and u-blox AT Commands Manual [3]).
When the modules are switched on by an appropriate
power-on event (see 1.6.1), the module enter active-mode
from power-off mode.
If power saving configuration is enabled by the AT+UPSV
command, the module automatically switches from active
to idle-mode whenever possible and the module wakes up
from idle to active-mode in the events listed above (see
idle-mode to active-mode transition description above).
When a RF Tx/Rx data connection is initiated or when RF
Tx/Rx is required due to a connection previously initiated,
the module switches from active to connected-mode.
Connected-Mode
RF Tx/Rx data connection is in progress.
The module is prepared to accept data signals from
an external device unless power saving configuration
is enabled by AT+UPSV (see sections 1.9.1.4, 1.9.2.4
and u-blox AT Commands Manual [3]).
When a data connection is initiated, the module enters
connected-mode from idle-mode.
If power saving configuration is enabled by the AT+UPSV
command, the module automatically switches from
connected to active and then idle-mode whenever possible
and the module wakes up from idle to active and then
connected mode if RF Transmission/Reception is necessary.
When a data connection is terminated, the module returns
to the active-mode.
Table 6: TOBY-L2 and MPCI-L2 series modules operating modes description
Figure 3 describes the transition between the different operating modes.
Not
powered
TOBY-L2:
• Remove VCC
TOBY-L2 Switch ON:
• Apply VCC
MPCI-L2 Switch ON:
• Apply 3.3Vaux
Power off
MPCI-L2:
• AT+CFUN=127 and
then remove 3.3Vaux
TOBY-L2
Switch ON:
• PWR_ON
• RESET_N
• RTC alarm
TOBY-L2
Switch OFF:
• AT+CPWROFF
• RESET_N
Incoming/outgoing call or
other dedicated device
network communication
Connected
If power saving is enabled
and there is no activity for
a defined time interval
Active
No RF Tx/Rx in progress,
Call terminated,
Communication dropped
Idle
Any wake up event described
in the module operating
modes summary table above
Figure 3: TOBY-L2 and MPCI-L2 series modules operating modes transition
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1.5
Supply interfaces
1.5.1 Module supply input (VCC or 3.3Vaux)
TOBY-L2 modules are supplied via the three VCC pins, and MPCI-L2 modules are supplied via the five 3.3Vaux
pins. All supply voltages used inside the modules are generated from the VCC or the 3.3Vaux supply input by
integrated voltage regulators, including the V_BCKP RTC supply, the V_INT generic digital interface supply, and
the VSIM or UIM_PWR SIM interface supply.
The current drawn by the TOBY-L2 and MPCI-L2 series modules through the VCC or 3.3Vaux pins can vary by
several orders of magnitude depending on radio access technology, operation mode and state. It is important
that the supply source is able to support both the high peak of current consumption during 2G transmission at
maximum RF power level (as described in the section 1.5.1.2) and the high average current consumption during
3G and LTE transmission at maximum RF power level (as described in the sections 1.5.1.3 and 1.5.1.4).
1.5.1.1
VCC or 3.3Vaux supply requirements
Table 7 summarizes the requirements for the VCC or 3.3Vaux modules supply. See section 2.2.1 for suggestions
to properly design a VCC or 3.3Vaux supply circuit compliant with the requirements listed in Table 7.
The supply circuit affects the RF compliance of the device integrating TOBY-L2 and MPCI-L2
series modules with applicable required certification schemes as well as antenna circuit design.
Compliance is guaranteed if the requirements summarized in the Table 7 are fulfilled.
Item
Requirement
Remark
VCC or 3.3Vaux
nominal voltage
Within VCC or 3.3Vaux normal operating range:
See “Supply/Power pins” section in the TOBY-L2 Data
Sheet [1] or in the MPCI-L2 Data Sheet [2].
The modules cannot be switched on if the supply voltage
is below the normal operating range minimum limit.
VCC or 3.3Vaux
voltage during
normal operation
Within VCC or 3.3Vaux extended operating range:
See “Supply/Power pins” section in the TOBY-L2 Data
Sheet [1] or in the MPCI-L2 Data Sheet [2].
The modules may switch off if the supply voltage drops
below the extended operating range minimum limit.
VCC or 3.3Vaux
average current
Support with adequate margin the highest averaged
current consumption value in connected-mode
conditions specified for VCC in TOBY-L2 Data Sheet [1]
or specified for 3.3Vaux in MPCI-L2 Data Sheet [2].
The maximum average current consumption can be
greater than the specified value according to the actual
antenna mismatching, temperature and supply voltage.
Sections 1.5.1.2, 1.5.1.3 and 1.5.1.4 describe current
consumption profiles in 2G, 3G and LTE connected-mode.
VCC or 3.3Vaux
peak current
Support with margin the highest peak current
consumption value in 2G connected-mode conditions
specified for VCC in TOBY-L2 Data Sheet [1] or
specified for 3.3Vaux in MPCI-L2 Data Sheet [2].
The specified maximum peak of current consumption
occurs during GSM single transmit slot in 850/900 MHz
connected-mode, in case of mismatched antenna.
Section 1.5.1.2 describes 2G Tx peak/pulse current.
VCC or 3.3Vaux
voltage drop during
2G Tx slots
Lower than 400 mV
Supply voltage drop values greater than recommended
during 2G TDMA transmission slots directly affect the RF
compliance with applicable certification schemes.
Figure 5 describes supply voltage drop during 2G Tx slots.
VCC or 3.3Vaux
voltage ripple during
RF transmission
Noise in the supply has to be minimized
High supply voltage ripple values during LTE/3G/2G RF
transmissions in connected-mode directly affect the RF
compliance with applicable certification schemes.
Figure 5 describes supply voltage ripple during RF Tx.
VCC or 3.3Vaux
under/over-shoot at
start/end of Tx slots
Absent or at least minimized
Supply voltage under-shoot or over-shoot at the start or
the end of 2G TDMA transmission slots directly affect the
RF compliance with applicable certification schemes.
Figure 5 describes supply voltage under/over-shoot
Table 7: Summary of VCC or 3.3Vaux modules supply requirements
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1.5.1.2 VCC or 3.3Vaux current consumption in 2G connected-mode
When a GSM call is established, the VCC or 3.3Vaux module current consumption is determined by the current
consumption profile typical of the GSM transmitting and receiving bursts.
The peak of current consumption during a transmission slot is strictly dependent on the RF transmitted power,
which is regulated by the network. The transmitted power in the transmit slot is also the more relevant factor for
determining the average current consumption.
If the module is transmitting in 2G single-slot mode in the 850 or 900 MHz bands, at the maximum RF power
level (approximately 2 W or 33 dBm in the allocated transmit slot/burst) the current consumption can reach an
high peak (see the “Current consumption” section in the TOBY-L2 Data Sheet [1] or the MPCI-L2 Data Sheet [2])
for 576.9 µs (width of the transmit slot/burst) with a periodicity of 4.615 ms (width of 1 frame = 8 slots/burst),
so with a 1/8 duty cycle according to GSM TDMA (Time Division Multiple Access).
If the module is transmitting in 2G single-slot mode in the 1800 or 1900 MHz bands, the current consumption
figures are quite less high than the one in the low bands, due to 3GPP transmitter output power specifications.
During a GSM call, current consumption is not so significantly high in receiving or in monitor bursts and is low in
the inactive unused bursts.
Figure 4 shows an example of the module current consumption profile versus time in 2G single-slot mode.
Current [A]
2.5
1900 mA
2.0
1.5
Peak current depends
on TX power and
actual antenna load
1.0
0.5
200 mA
60-120 mA
0.0
RX
slot
60-120 mA
10-40 mA
unused unused
slot
slot
TX
slot
unused unused
slot
slot
MON
slot
unused
slot
RX
slot
unused unused
slot
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
TX
slot
unused unused
slot
slot
MON
slot
unused
slot
Time [ms]
GSM frame
4.615 ms
(1 frame = 8 slots)
Figure 4: VCC or 3.3Vaux current consumption profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)
Figure 5 illustrates VCC or 3.3Vaux voltage profile versus time during a 2G single-slot call, according to the
relative VCC or 3.3Vaux current consumption profile described in Figure 4.
Voltage [mV]
overshoot
3.8 V
(typ)
drop
ripple
RX
slot
unused unused
slot
slot
TX
slot
undershoot
unused unused
slot
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
MON
slot
unused
slot
RX
slot
unused unused
slot
slot
TX
slot
unused unused
slot
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
MON
slot
unused
slot
Time [ms]
Figure 5: VCC or 3.3Vaux voltage profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)
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When a GPRS connection is established, more than one slot can be used to transmit and/or more than one slot
can be used to receive. The transmitted power depends on network conditions, which set the peak current
consumption, but following the 3GPP specifications the maximum Tx RF power is reduced if more than one slot
is used to transmit, so the maximum peak of current is not as high as can be in case of a 2G single-slot call.
If the module transmits in GPRS class 12 in the 850 or 900 MHz bands, at the maximum RF power control level,
the current consumption can reach a quite high peak but lower than the one achievable in 2G single-slot mode.
This happens for 2.307 ms (width of the 4 transmit slots/bursts) with a periodicity of 4.615 ms (width of 1 frame
= 8 slots/bursts), so with a 1/2 duty cycle, according to 2G TDMA.
If the module is in GPRS connected mode in the 1800 or 1900 MHz bands, the current consumption figures are
quite less high than the one in the low bands, due to 3GPP transmitter output power specifications.
Figure 6 reports the current consumption profiles in GPRS class 12 connected mode, in the 850 or 900 MHz
bands, with 4 slots used to transmit and 1 slot used to receive.
Current [A]
2.5
1600 mA
2.0
1.5
Peak current depends
on TX power and
actual antenna load
1.0
0.5
200mA
60-130mA
0.0
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
MON
slot
unused
slot
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
Time [ms]
GSM frame
4.615 ms
(1 frame = 8 slots)
Figure 6: VCC or 3.3Vaux current consumption profile during a 2G GPRS/EDGE multi-slot connection (4 TX slots, 1 RX slot)
In case of EDGE connections the VCC current consumption profile is very similar to the GPRS current profile, so
the image shown in Figure 6, representing the current consumption profile in GPRS class 12 connected mode, is
valid for the EDGE class 12 connected mode as well.
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1.5.1.3 VCC or 3.3Vaux current consumption in 3G connected mode
During a 3G connection, the module can transmit and receive continuously due to the Frequency Division Duplex
(FDD) mode of operation with the Wideband Code Division Multiple Access (WCDMA).
The current consumption depends again on output RF power, which is always regulated by network commands.
These power control commands are logically divided into a slot of 666 µs, thus the rate of power change can
reach a maximum rate of 1.5 kHz.
There are no high current peaks as in the 2G connection, since transmission and reception are continuously
enabled due to FDD WCDMA implemented in the 3G that differs from the TDMA implemented in the 2G case.
In the worst scenario, corresponding to a continuous transmission and reception at maximum output power
(approximately 250 mW or 24 dBm), the average current drawn by the module at the VCC pins is high (see the
“Current consumption” section in TOBY-L2 Data Sheet [1] or in MPCI-L2 Data Sheet [2]). Even at lowest output
RF power (approximately 0.01 µW or -50 dBm), the current is still not so low due to module baseband
processing and transceiver activity.
Figure 7 shows an example of current consumption profile of the module in 3G WCDMA/DC-HSPA+ continuous
transmission mode.
Current [mA]
700
850 mA
600
500
Current consumption value
depends on TX power and
actual antenna load
400
300
170 mA
200
100
1 slot
666 µs
3G frame
10 ms
(1 frame = 15 slots)
Time
[ms]
Figure 7: VCC or 3.3Vaux current consumption profile versus time during a 3G connection (TX and RX continuously enabled)
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1.5.1.4 VCC or 3.3Vaux current consumption in LTE connected-mode
During a LTE connection, the module can transmit and receive continuously due to LTE radio access technology.
The current consumption is strictly dependent on the transmitted RF output power, which is always regulated by
network commands. These power control commands are logically divided into a slot of 0.5 ms (time length of
one Resource Block), thus the rate of power change can reach a maximum rate of 2 kHz.
Figure 8 shows an example of the module current consumption profile versus time in LTE connected-mode.
Detailed current consumption values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2 Data Sheet [2].
Current [mA]
700
600
Current consumption value
depends on TX power and
actual antenna load
500
400
300
200
100
1 Slot
1 Resource Block
(0.5 ms)
1 LTE Radio Frame
(10 ms)
Time
[ms]
Figure 8: VCC or 3.3Vaux current consumption profile versus time during LTE connection (TX and RX continuously enabled)
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1.5.1.5 VCC or 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)
The power saving configuration is by default disabled, but it can be enabled using the AT+UPSV command (see
the u-blox AT Commands Manual [3]). When power saving is enabled, the module automatically enters the low
power idle-mode whenever possible, reducing current consumption.
During low power idle-mode, the module processor runs with 32 kHz reference clock frequency.
When the power saving configuration is enabled and the module is registered or attached to a network, the
module automatically enters the low power idle-mode whenever possible, but it must periodically monitor the
paging channel of the current base station (paging block reception), in accordance to the 2G/3G/LTE system
requirements, even if connected-mode is not enabled by the application. When the module monitors the paging
channel, it wakes up to the active-mode, to enable the reception of paging block. In between, the module
switches to low power idle-mode. This is known as discontinuous reception (DRX).
The module processor core is activated during the paging block reception, and automatically switches its
reference clock frequency from 32 kHz to the 26 MHz used in active-mode.
The time period between two paging block receptions is defined by the network. This is the paging period
parameter, fixed by the base station through broadcast channel sent to all users on the same serving cell:

In case of 2G radio access technology, the paging period can vary from 470.8 ms (DRX = 2, length of 2 x 51
2G frames = 2 x 51 x 4.615 ms) up to 2118.4 ms (DRX = 9, length of 9 x 51 2G frames = 9 x 51 x 4.615 ms)

In case of 3G radio access technology, the paging period can vary from 640 ms (DRX = 6, i.e. length of 2
3G frames = 64 x 10 ms) up to 5120 ms (DRX = 9, length of 2 3G frames = 512 x 10 ms).

In case of LTE radio access technology, the paging period can vary from 320 ms (DRX = 5, i.e. length of 2
LTE frames = 32 x 10 ms) up to 2560 ms (DRX = 8, length of 2 LTE frames = 256 x 10 ms).
Figure 9 illustrates a typical example of the module current consumption profile when power saving is enabled.
The module is registered with network, automatically enters the low power idle-mode and periodically wakes up
to active-mode to monitor the paging channel for the paging block reception. Detailed current consumption
values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2 Data Sheet [2].
Current [mA]
100
Time [s]
Current [mA]
IDLE MODE
ACTIVE MODE
2G case: 0.44-2.09 s
3G case: 0.61-5.09 s
LTE case: 0.27-2.51 s
~50 ms
100
Active Mode
Enabled
IDLE MODE
RX
Enabled
Idle Mode
Enabled
~50 ms
ACTIVE MODE
Time [ms]
IDLE MODE
Figure 9: VCC or 3.3Vaux current consumption profile with power saving enabled and module registered with the network:
the module is in idle-mode and periodically wakes up to active-mode to monitor the paging channel for paging block reception
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1.5.1.6 VCC or 3.3Vaux current consumption in fixed active-mode (power saving disabled)
When power saving is disabled, the module does not automatically enter the low power idle-mode whenever
possible: the module remains in active-mode. Power saving configuration is by default disabled. It can also be
disabled using the AT+UPSV command (see u-blox AT Commands Manual [3] for detail usage).
The module processor core is activated during idle-mode, and the 26 MHz reference clock frequency is used. It
would draw more current during the paging period than that in the power saving mode.
Figure 10 illustrates a typical example of the module current consumption profile when power saving is disabled.
In such case, the module is registered with the network and while active-mode is maintained, the receiver is
periodically activated to monitor the paging channel for paging block reception. Detailed current consumption
values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2 Data Sheet [2].
Current [mA]
100
Time [s]
Current [mA]
Paging period
2G case: 0.44-2.09 s
3G case: 0.61-5.09 s
LTE case: 0.32-2.56 s
100
Time [ms]
RX
Enabled
ACTIVE MODE
Figure 10: VCC or 3.3Vaux current consumption profile with power saving disabled and module registered with the network:
active-mode is always held and the receiver is periodically activated to monitor the paging channel for paging block reception
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1.5.2 RTC supply input/output (V_BCKP)
The RTC supply V_BCKP pin is not available on MPCI-L2 series modules.
The V_BCKP pin of TOBY-L2 series modules connects the supply for the Real Time Clock (RTC). A linear LDO
regulator integrated in the Power Management Unit internally generates this supply, as shown in Figure 11, with
low current capability (see the TOBY-L2 series Data Sheet [1]). The output of this regulator is always enabled
when the main module voltage supply applied to the VCC pins is within the valid operating range.
TOBY-L2 series
VCC 70
VCC 71
Power
Management
Baseband
Processor
Linear
LDO
RTC
VCC 72
V_BCKP
32 kHz
Figure 11: TOBY-L2 series RTC supply (V_BCKP) simplified block diagram
The RTC provides the module time reference (date and time) that is used to set the wake-up interval during the
low power idle-mode periods, and is able to make available the programmable alarm functions.
The RTC functions are available also in power-down mode when the V_BCKP voltage is within its valid range
(specified in the “Input characteristics of Supply/Power pins” table in TOBY-L2 series Data Sheet [1]). The RTC
can be supplied from an external back-up battery through the V_BCKP, when the main module voltage supply is
not applied to the VCC pins. This lets the time reference (date and time) run until the V_BCKP voltage is within
its valid range, even when the main supply is not provided to the module.
Consider that the module cannot switch on if a valid voltage is not present on VCC even when the RTC is
supplied through V_BCKP (meaning that VCC is mandatory to switch on the module).
The RTC has very low current consumption, but is highly temperature dependent. For example, V_BCKP current
consumption at the maximum operating temperature can be higher than the typical value at 25 °C specified in
the “Input characteristics of Supply/Power pins” table in the TOBY-L2 series Data Sheet [1].
If V_BCKP is left unconnected and the module main supply is not applied to the VCC pins, the RTC is supplied
from the bypass capacitor mounted inside the module. However, this capacitor is not able to provide a long
buffering time: within few milliseconds the voltage on V_BCKP will go below the valid range (1.4 V min). This
has no impact on cellular connectivity, as all the module functionalities do not rely on date and time setting.
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1.5.3 Generic digital interfaces supply output (V_INT)
The generic digital interfaces supply V_INT pin is not available on MPCI-L2 series modules.
The V_INT output pin of the TOBY-L2 series modules is connected to an internal 1.8 V supply with current
capability specified in the TOBY-L2 series Data Sheet [1]. This supply is internally generated by a switching stepdown regulator integrated in the Power Management Unit and it is internally used to source the generic digital
I/O interfaces of the TOBY-L2 module, as described in Figure 12. The output of this regulator is enabled when
the module is switched on and it is disabled when the module is switched off.
TOBY-L2 series
VCC 70
VCC 71
Power
Management
Baseband
Processor
Switching
Step-Down
Digital I/O
VCC 72
V_INT 5
Figure 12: TOBY-L2 series generic digital interfaces supply output (V_INT) simplified block diagram
The switching regulator operates in Pulse Width Modulation (PWM) mode for greater efficiency at high output
loads and it automatically switches to Pulse Frequency Modulation (PFM) power save mode for greater efficiency
at low output loads. The V_INT output voltage ripple is specified in the TOBY-L2 series Data Sheet [1].
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1.6
System function interfaces
1.6.1 Module power-on
The PWR_ON input pin is not available on MPCI-L2 series modules.
When the TOBY-L2 and MPCI-L2 series modules are in the not-powered mode (switched off, i.e. the VCC or
3.3Vaux module supply is not applied), they can be switched on as following:

Rising edge on the VCC or 3.3Vaux supply input to a valid voltage for module supply, so that the module
switches on applying a proper VCC or 3.3Vaux supply within the normal operating range.

Alternately, the RESET_N or PERST# pin can be held to the low level during the VCC or 3.3Vaux rising
edge, so that the module switches on releasing the RESET_N or PERST# pin when the VCC or 3.3Vaux
module supply voltage stabilizes at its proper nominal value within the normal operating range.
The status of the PWR_ON input pin of TOBY-L2 modules while applying the VCC module supply is not relevant:
during this phase the PWR_ON pin can be set high or low by the external circuit.
When the TOBY-L2 modules are in the power-off mode (i.e. switched off with valid VCC module supply applied),
they can be switched on as following:

Low level on the PWR_ON pin, which is normally set high by an internal pull-up, for a valid time period.

Low level on the RESET_N pin, which is normally set high by an internal pull-up, for a valid time period.

RTC alarm, i.e. pre-programmed alarm by AT+CALA command (see u-blox AT Commands Manual [3]).
As described in Figure 13, the TOBY-L2 series PWR_ON input is equipped with an internal active pull-up resistor
to the VCC module supply: the PWR_ON input voltage thresholds are different from the other generic digital
interfaces. Detailed electrical characteristics are described in TOBY-L2 series Data Sheet [1].
TOBY-L2 series
VCC
Power
Management
Baseband
Processor
50k
PWR_ON 20
Power-on
Power-on
Figure 13: TOBY-L2 series PWR_ON input description
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Figure 14 shows the module power-on sequence from the not-powered mode, describing the following phases:

The external supply is applied to the VCC or 3.3Vaux module supply inputs, representing the start-up event.

The PWR_ON and the RESET_N or PERST# pins suddenly rise to high logic level due to internal pull-ups.

The V_BCKP RTC supply output is suddenly enabled by the module as VCC reaches a valid voltage value.

All the generic digital pins of the module are tri-stated until the switch-on of their supply source (V_INT).

The internal reset signal is held low: the baseband core and all the digital pins are held in the reset state.
The reset state of all the digital pins is reported in the pin description table of TOBY-L2 Series Data Sheet [1].

When the internal reset signal is released, any digital pin is set in a proper sequence from the reset state to
the default operational configured state. The duration of this pins’ configuration phase differs within generic
digital interfaces and the USB interface due to host / device enumeration timings (see section 1.9.1).

The module is fully ready to operate after all interfaces are configured.
Start of interface
configuration
Start-up
event
Module interfaces
are configured
VCC or 3.3Vaux
V_BCKP
PWR_ON
RESET_N or PERST#
V_INT
Internal Reset
OFF
System State
BB Pads State
Tristate / Floating
0 ms
ON
Internal Reset Internal Reset → Operational Operational
~5 ms
~10 ms
~20 s
Figure 14: TOBY-L2 and MPCI-L2 series power-on sequence description
The Internal Reset signal is not available on a module pin, but the host application can monitor:

The V_INT pin to sense the start of the TOBY-L2 module power-on sequence.

The USB interface to sense the start of the MPCI-L2 module power-on sequence: the module, as USB
device, informs the host of the attach event via a reply on its status change pipe for proper bus
enumeration process according to Universal Serial Bus Revision 2.0 specification [6].
Before the switch-on of the generic digital interface supply source (V_INT) of the module, no voltage
driven by an external application should be applied to any generic digital interface of TOBY-L2 module.
Before the TOBY-L2 and MPCI-L2 series module is fully ready to operate, the host application processor
should not send any AT command over the AT communication interfaces (USB, UART) of the module.
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1.6.2 Module power-off
TOBY-L2 series can be properly switched off by:

AT+CPWROFF command (see u-blox AT Commands Manual [3]). The current parameter settings are saved in
the module’s non-volatile memory and a proper network detach is performed.
The MPCI-L2 series modules do not switch off by the AT+CPWROFF command as the TOBY-L2 modules,
but the AT+CPWROFF command causes a reset (reboot) of the module due to the MPCI-L2 module’s
internal configuration: the command stores the actual parameter settings in the non-volatile memory of
MPCI-L2 modules and performs a network detach, with a subsequent reset (reboot) of the module.
An abrupt under-voltage shutdown occurs on TOBY-L2 and MPCI-L2 series modules when the VCC or 3.3Vaux
module supply is removed. If this occurs, it is not possible to perform the storing of the current parameter
settings in the module’s non-volatile memory or to perform the proper network detach.
It is highly recommended to avoid an abrupt removal of the VCC supply during TOBY-L2 modules normal
operations: the power off procedure must be started by the AT+CPWROFF command, waiting the
command response for a proper time period (see u-blox AT Commands Manual [3]), and then a proper
VCC supply has to be held at least until the end of the modules’ internal power off sequence, which
occurs when the generic digital interfaces supply output (V_INT) is switched off by the module.
It is highly recommended to avoid an abrupt removal of the 3.3Vaux supply during MPCI-L2 modules
normal operations: the power off procedure must be started by setting the MPCI-L2 module in the halt
mode by the AT+CFUN=127 command (which stores the actual parameter settings in the non-volatile
memory of the module and performs a network detach), waiting the command response for a proper
time period (see the u-blox AT Commands Manual [3]), and then the 3.3Vaux supply can be removed.
An abrupt hardware shutdown occurs on TOBY-L2 series modules when a low level is applied on the RESET_N
pin for a specific time period. In this case, the current parameter settings are not saved in the module’s
non-volatile memory and a proper network detach is not performed.
It is highly recommended to avoid an abrupt hardware shutdown of the module by forcing a low level on
the RESET_N input pin during module normal operation: the RESET_N line should be set low only if reset
or shutdown via AT commands fails or if the module does not reply to a specific AT command after a time
period longer than the one defined in the u-blox AT Commands Manual [3].
An over-temperature or an under-temperature shutdown occurs on TOBY-L2 and MPCI-L2 series modules when
the temperature measured within the cellular module reaches the dangerous area, if the optional Smart
Temperature Supervisor feature is enabled and configured by the dedicated AT command. For more details see
u-blox AT Commands Manual [3], +USTS AT command.
The Smart Temperature Supervisor feature is not supported by the “00”, “01”, and “50” product
versions.
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Figure 15 describes the TOBY-L2 power-off sequence by means of AT+CPWROFF with the following phases:

When the +CPWROFF AT command is sent, the module starts the switch-off routine.

The module replies OK on the AT interface: the switch-off routine is in progress.

At the end of the switch-off routine, all the digital pins are tri-stated and all the internal voltage regulators
are turned off, including the generic digital interfaces supply (V_INT), except the RTC supply (V_BCKP).

Then, the module remains in power-off mode as long as a switch on event does not occur (e.g. applying a
proper low level to the PWR_ON input, or applying a proper low level to the RESET_N input), and enters
not-powered mode if the supply is removed from the VCC pins.
AT+CPWROFF
sent to the module
OK
replied by the module
VCC
can be removed
VCC
V_BCKP
PWR_ON
RESET_N
V_INT
Internal Reset
ON
System State
BB Pads State
Operational
OFF
Tristate / Floating
Operational → Tristate
0s
~2.5 s
Figure 15: TOBY-L2 series power-off sequence description
~5 s
The Internal Reset signal is not available on a module pin, but the application can monitor the V_INT pin
to sense the end of the power-off sequence.
Figure 16 describes the MPCI-L2 power-off procedure with the following phases:

When the AT+CFUN=127 command is issued, the module starts the halt mode setting routine.

The module replies OK on the AT interface: after this, the module is set in the halt mode.

Then, the module remains in the Halt mode and enters not-powered mode if the supply is removed from the
3.3Vaux pins.
AT+CFUN=127
sent to the module
OK
replied by the module
3.3Vaux
can be removed
3.3Vaux
PERST#
Internal Reset
System State
ON
OFF
BB Pads State
Operational
Tristate / Floating
0s
~2.5 s
Figure 16: MPCI-L2 series power-off procedure description
~5 s
The duration of each phase in the TOBY-L2 and MPCI-L2 series modules’ switch-off routines can largely
vary depending on the application / network settings and the concurrent module activities.
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1.6.3 Module reset
TOBY-L2 and MPCI-L2 series modules can be properly reset (rebooted) by:
 AT+CFUN command (see u-blox AT Commands Manual [3]).
MPCI-L2 series modules can be additionally properly reset (rebooted) by:

AT+CPWROFF command (see u-blox AT Commands Manual [3]): the behavior differs than TOBY-L2 series, as
MPCI-L2 modules will reboot rather than remain switched off due to modules’ internal configuration.
In the cases listed above an “internal” or “software” reset of the module is executed: the current parameter
settings are saved in the module’s non-volatile memory and a proper network detach is performed.
An abrupt hardware reset occurs on TOBY-L2 and MPCI-L2 series modules when a low level is applied on the
RESET_N or PERST# input pin for a specific time period. In this case, the current parameter settings are not
saved in the module’s non-volatile memory and a proper network detach is not performed.
It is highly recommended to avoid an abrupt hardware reset of the module by forcing a low level on the
RESET_N or PERST# input during modules normal operation: the RESET_N or PERST# line should be set
low only if reset or shutdown via AT commands fails or if the module does not provide a reply to a specific
AT command after a time period longer than the one defined in the u-blox AT Commands Manual [3].
As described in Figure 17, the RESET_N and PERST# input pins are equipped with an internal pull-up to the
VCC supply in the TOBY-L2 series and to the 3.3 V in the MPCI-L2 series.
TOBY-L2 series
Power
Management
VCC
Baseband
Processor
50k
RESET_N 23
Reset
Reset
MPCI-L2 series
3.3 V
Power
Management
Baseband
Processor
Reset
Reset
45k
PERST# 22
Figure 17: TOBY-L2 and MPCI-L2 series RESET_N and PERST# input equivalent circuit description
For more electrical characteristics details see TOBY-L2 Data Sheet [1] and MPCI-L2 Data Sheet [2].
1.6.4 Module configuration selection by host processor
The HOST_SELECT0 and HOST_SELECT1 pins are not available on MPCI-L2 series modules.
The selection of the module configuration by the host application processor over the HOST_SELECT0 and
HOST_SELECT1 pins is not supported by TOBY-L2 “00”, “01”, and “50” product versions.
TOBY-L2 series modules include two input pins (HOST_SELECT0 and HOST_SELECT1) for the selection of the
module configuration by the host application processor.
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1.7
Antenna interface
1.7.1 Antenna RF interfaces (ANT1 / ANT2)
TOBY-L2 and MPCI-L2 series modules provide two RF interfaces for connecting the external antennas:

The ANT1 represents the primary RF input/output for transmission and reception of LTE/3G/2G RF signals.
The ANT1 pin of TOBY-L2 series modules has a nominal characteristic impedance of 50  and must be
connected to the primary Tx / Rx antenna through a 50  transmission line to allow proper RF transmission
and reception.
The ANT1 Hirose U.FL-R-SMT coaxial connector receptacle of MPCI-L2 series modules has a nominal
characteristic impedance of 50  and must be connected to the primary Tx / Rx antenna through a mated RF
plug with a 50  coaxial cable assembly to allow proper RF transmission and reception.

The ANT2 represents the secondary RF input for the reception of the LTE RF signals for the Down-Link
MIMO 2 x 2 radio technology supported by TOBY-L2 and MPCI-L2 series modules as required feature for LTE
category 4 UEs, and for the reception of the 3G RF signals for the Down-Link Rx diversity radio technology
supported by TOBY-L2 and MPCI-L2 series modules as additional feature for 3G DC-HSDPA category 24 UEs.
The ANT2 pin of TOBY-L2 series modules has a nominal characteristic impedance of 50  and must be
connected to the secondary Rx antenna through a 50  transmission line to allow proper RF reception.
The ANT2 Hirose U.FL-R-SMT coaxial connector receptacle of MPCI-L2 series modules has a nominal
characteristic impedance of 50  and must be connected to the secondary Rx antenna through a mated RF
plug with a 50  coaxial cable assembly to allow proper RF reception.
The Multiple Input Multiple Output (MIMO) radio technology is an essential component of LTE radio systems
based on the use of multiple antennas at both the transmitter and receiver sides to improve communication
performance and achieve highest possible bit rate. A MIMO m x n system consists of m transmit and n receive
antennas, where the data to be transmitted is divided into m independent data streams. Note that the terms
Input and Output refer to the radio channel carrying the signal, not to the devices having antennas, so that in
the Down-Link MIMO 2 x 2 system supported by TOBY-L2 and MPCI-L2 series modules:

The LTE data stream is divided into 2 independent streams by the Tx-antennas of the base station

The cellular modules, at the receiver side, receives both LTE data streams by 2 Rx-antennas (ANT1 / ANT2)
Base Station
Tx-1
Antenna
Rx-1
Antenna
Data Stream 1
TOBY-L2 series
MPCI-L2 series
ANT1
Tx-2
Antenna
Rx-2
Antenna
Data Stream 2
ANT2
Figure 18: Description of the LTE Down-Link MIMO 2 x 2 radio technology supported by TOBY-L2 and MPCI-L2 series modules
TOBY-L2 and MPCI-L2 series modules support the LTE MIMO 2 x 2 radio technology in the Down-Link path only
(from the base station to the module): the ANT1 port is the only one RF interface that is used by the module to
transmit the RF signal in the Up-Link path (from the module to the base station).
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1.7.1.1 Antenna RF interfaces requirements
Table 8, Table 9 and Table 10 summarize the requirements for the antennas RF interfaces (ANT1 / ANT2). See
section 2.4.1 for suggestions to properly design antennas circuits compliant with these requirements.
The antenna circuits affect the RF compliance of the device integrating TOBY-L2 and MPCI-L2
series modules with applicable required certification schemes (for more details see section 4).
Compliance is guaranteed if the antenna RF interfaces (ANT1 / ANT2) requirements summarized
in Table 8, Table 9 and Table 10 are fulfilled.
Item
Requirements
Remarks
Impedance
50  nominal characteristic impedance
Frequency Range
See the TOBY-L2 series Data Sheet [1] and the
MPCI-L2 series Data Sheet [2]
Return Loss
S11 < -10 dB (VSWR < 2:1) recommended
S11 < -6 dB (VSWR < 3:1) acceptable
Efficiency
> -1.5 dB ( > 70% ) recommended
> -3.0 dB ( > 50% ) acceptable
The impedance of the antenna RF connection must
match the 50  impedance of the ANT1 port.
The required frequency range of the antenna connected
to ANT1 port depends on the operating bands of the
used cellular module and the used mobile network.
The Return loss or the S11, as the VSWR, refers to the
amount of reflected power, measuring how well the
primary antenna RF connection matches the 50 
characteristic impedance of the ANT1 port.
The impedance of the antenna termination must match
as much as possible the 50  nominal impedance of the
ANT1 port over the operating frequency range, reducing
as much as possible the amount of reflected power.
The radiation efficiency is the ratio of the radiated power
to the power delivered to antenna input: the efficiency is
a measure of how well an antenna receives or transmits.
The radiation efficiency of the antenna connected to the
ANT1 port needs to be enough high over the operating
frequency range to comply with the Over-The-Air (OTA)
radiated performance requirements, as Total Radiated
Power (TRP) and the Total Isotropic Sensitivity (TIS),
specified by applicable related certification schemes.
Maximum Gain
According to radiation exposure limits
Input Power
> 33 dBm ( > 2 W )
The power gain of an antenna is the radiation efficiency
multiplied by the directivity: the gain describes how
much power is transmitted in the direction of peak
radiation to that of an isotropic source.
The maximum gain of the antenna connected to ANT1
port must not exceed the herein stated value to comply
with regulatory agencies radiation exposure limits.
For additional info see the section 4.2.2.
The antenna connected to the ANT1 port must support
with adequate margin the maximum power transmitted
by the modules.
Table 8: Summary of primary Tx/Rx antenna RF interface (ANT1) requirements
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Item
Requirements
Remarks
Impedance
50  nominal characteristic impedance
The impedance of the antenna RF connection must
match the 50  impedance of the ANT2 port.
Frequency Range
See the TOBY-L2 series Data Sheet [1] and the
MPCI-L2 series Data Sheet [2]
The required frequency range of the antennas connected
to ANT2 port depends on the operating bands of the
used cellular module and the used Mobile Network.
Return Loss
S11 < -10 dB (VSWR < 2:1) recommended
S11 < -6 dB (VSWR < 3:1) acceptable
The Return loss or the S11, as the VSWR, refers to the
amount of reflected power, measuring how well the
secondary antenna RF connection matches the 50 
characteristic impedance of the ANT2 port.
The impedance of the antenna termination must match
as much as possible the 50  nominal impedance of the
ANT2 port over the operating frequency range, reducing
as much as possible the amount of reflected power.
Efficiency
> -1.5 dB ( > 70% ) recommended
> -3.0 dB ( > 50% ) acceptable
The radiation efficiency is the ratio of the radiated power
to the power delivered to antenna input: the efficiency is
a measure of how well an antenna receives or transmits.
The radiation efficiency of the antenna connected to the
ANT2 port needs to be enough high over the operating
frequency range to comply with the Over-The-Air (OTA)
radiated performance requirements, as the TIS, specified
by applicable related certification schemes.
Table 9: Summary of secondary Rx antenna RF interface (ANT2) requirements
Item
Requirements
Remarks
Efficiency imbalance
< 0.5 dB recommended
< 1.0 dB acceptable
Envelope Correlation
Coefficient
< 0.4 recommended
< 0.5 acceptable
Isolation
> 15 dB recommended
> 10 dB acceptable
The radiation efficiency imbalance is the ratio of the
primary (ANT1) antenna efficiency to the secondary
(ANT2) antenna efficiency: the efficiency imbalance is a
measure of how much better an antenna receives or
transmits compared to the other antenna.
The radiation efficiency of the secondary antenna needs
to be roughly the same of the radiation efficiency of the
primary antenna for good RF performance.
The Envelope Correlation Coefficient (ECC) between the
primary (ANT1) and the secondary (ANT2) antenna is an
indicator of 3D radiation pattern similarity between the
two antennas: low ECC results from antenna patterns
with radiation lobes in different directions.
The ECC between primary and secondary antenna needs
to be enough low to comply with radiated performance
requirements specified by related certification schemes.
The antenna to antenna isolation is the loss between the
primary (ANT1) and the secondary (ANT2) antenna: high
isolation results from low coupled antennas.
The isolation between primary and secondary antenna
needs to be high for good RF performance.
Table 10: Summary of primary (ANT1) and secondary (ANT2) antennas relationship requirements
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1.7.2 Antenna detection interface (ANT_DET)
Antenna detection (ANT_DET) is not available on MPCI-L2 series modules.
Antenna detection (ANT_DET) is not supported by TOBY-L2 “00”, “01”, and “50” product versions.
The antenna detection is based on ADC measurement. The ANT_DET pin is an Analog to Digital Converter
(ADC) provided to sense the antenna presence.
The antenna detection function provided by ANT_DET pin is an optional feature that can be implemented if the
application requires it. The antenna detection is forced by the +UANTR AT command. See the u-blox AT
Commands Manual [3] for more details on this feature.
The ANT_DET pin generates a DC current (for detailed characteristics see the TOBY-L2 series Data Sheet [1]) and
measures the resulting DC voltage, thus determining the resistance from the antenna connector provided on the
application board to GND. So, the requirements to achieve antenna detection functionality are the following:

an RF antenna assembly with a built-in resistor (diagnostic circuit) must be used
 an antenna detection circuit must be implemented on the application board
See section 2.4.2 for antenna detection circuit on application board and diagnostic circuit on antenna assembly
design-in guidelines.
1.8
SIM interface
1.8.1 SIM interface
TOBY-L2 and MPCI-L2 series modules provide high-speed SIM/ME interface including automatic detection and
configuration of the voltage required by the connected SIM card or chip.
Both 1.8 V and 3 V SIM types are supported. Activation and deactivation with automatic voltage switch from
1.8 V to 3 V are implemented, according to ISO-IEC 7816-3 specifications. The VSIM or UIM_PWR supply
output provides internal short circuit protection to limit start-up current and protect the SIM to short circuits.
The SIM driver supports the PPS (Protocol and Parameter Selection) procedure for baud-rate selection, according
to the values determined by the SIM card or chip.
1.8.2 SIM detection interface
SIM detection (GPIO5) is not available on MPCI-L2 series modules.
SIM detection (GPIO5) is not supported by TOBY-L2 “00”, “01”, and “50” product versions.
The GPIO5 pin is by default configured to detect the SIM card mechanical / physical presence. The pin is
configured as input with an internal active pull-down enabled, and it can sense SIM card presence only if
properly connected to the mechanical switch of a SIM card holder as described in section 2.5:

Low logic level at GPIO5 input pin is recognized as SIM card not present

High logic level at GPIO5 input pin is recognized as SIM card present
The SIM card detection function provided by GPIO5 pin is an optional feature that can be implemented / used or
not according to the application requirements: an Unsolicited Result Code (URC) is generated each time that
there is a change of status (for more details see the u-blox AT Commands Manual [3]).
The optional function “SIM card hot insertion/removal” can be additionally enabled on the GPIO5 pin by specific
AT command (see the u-blox AT Commands Manual [3]).
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1.9
Data communication interfaces
TOBY-L2 and MPCI-L2 series modules provide the following serial communication interface:

USB interface: High-Speed USB 2.0 compliant interface available for the communication with an external
host application processor, for AT commands, data communication, FW upgrade by means of the FOAT
feature, FW upgrade by means of the u-blox EasyFlash tool and for diagnostic purpose (see section 1.9.1 for
functional description)
TOBY-L2 series modules additionally provide the following serial communication interfaces:

UART interface: asynchronous serial interface available for the communication with an external host
application processor, for AT commands, data communication, FW upgrade by means of the FOAT feature
(see section 1.9.2 for functional description)

DDC interface: I C bus compatible interface available for the communication with u-blox GNSS positioning
chips/modules and with external I C devices as an audio codec (see section 1.9.3 for functional description)

SDIO interface: Secure Digital Input Output interface available for the communication with an external Wi-Fi
chip or module (see section 1.9.4 for functional description)
1.9.1 Universal Serial Bus (USB)
1.9.1.1
USB features
TOBY-L2 and MPCI-L2 series modules include a High-Speed USB 2.0 compliant interface with maximum data
rate of 480 Mb/s, representing the main interface for transferring high speed data with a host application
processor: the USB interface is available for AT commands, data communication, FW upgrade by means of the
FOAT feature, FW upgrade by means of the u-blox EasyFlash tool and for diagnostic purpose.
The module itself acts as a USB device and can be connected to a USB host such as a Personal Computer or an
embedded application microprocessor equipped with compatible drivers.
The USB_D+ / USB_D- lines carry the USB serial bus data and signaling, providing all the functionalities for the
bus attachment, configuration, enumeration, suspension or remote wakeup according to the Universal Serial Bus
Revision 2.0 specification [6]
The additional VUSB_DET input is available as an optional feature to sense the host VBUS voltage (5.0 V typical).
The VUSB_DET functionality is not supported by TOBY-L2 “00”, “01”, and “50” product versions: the
pin should be left unconnected or it should not be driven high by any external device, because a high
logic level applied to the pin will represent a module switch-on event (additional to the ones listed in
section 1.6.1) and will prevent reaching the minimum possible consumption with power saving enabled.
The VUSB_DET pin is not available on MPCI-L2 series modules.
The USB interface is controlled and operated with:

AT commands according to 3GPP TS 27.007 [8], 3GPP TS 27.005 [9], 3GPP TS 27.010 [10]

u-blox AT commands
For the complete list of supported AT commands and their syntax see u-blox AT Commands Manual [3].
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TOBY-L2 and MPCI-L2 modules provide by default the following USB profile with the listed set of USB functions:

1 RNDIS for Ethernet-over-USB connection

1 CDC-ACM for AT commands and data communication
The USB profile of TOBY-L2 and MPCI-L2 modules identifies itself by its VID (Vendor ID) and PID (Product ID)
combination, included in the USB device descriptor according to the USB 2.0 specifications [6].
The VID and PID of the default USB profile configuration with the set of functions described above (1 RNDIS for
Ethernet-over-USB and 1 CDC-ACM for AT commands and data) are the following:

VID = 0x1546

PID = 0x1146
Figure 19 summarizes the USB end-points available with the default USB profile configuration.
Default profile configuration
Function RNDIS
Interface 0
Wireless Controller – Remote NDIS
EndPoint
Interface 1
Transfer: Interrupt
Communication Data
EndPoint
Transfer: Bulk
EndPoint
Transfer: Bulk
Function CDC Serial
Interface 2
Communication Control – AT commands
EndPoint
Interface 3
Transfer: Interrupt
Communication Data
EndPoint
Transfer: Bulk
EndPoint
Transfer: Bulk
Figure 19: TOBY-L2 and MPCI-L2 series USB End-Points summary for the default USB profile configuration
The USB of the modules can be configured by the AT+UUSBCONF command (for more details see the u-blox AT
Commands Manual [3]) to select different sets of USB functions available in mutually exclusive way, selecting the
active USB profile consisting of a specific set of functions with various capabilities and purposes, such as:

CDC-ACM for AT commands and data

CDC-ACM for GNSS tunneling

CDC-ACM for SIM Access Profile (SAP)

CDC-ACM for diagnostic

RNDIS for Ethernet-over-USB

CDC-ECM for Ethernet-over-USB

CDC-NCM for Ethernet-over-USB

MBIM for Ethernet-over-USB
CDC-ACM for GNSS tunneling, CDC-ACM for SIM Access Profile (SAP), and CDC-NCM and MBIM
functions are not supported by TOBY-L2 “00”, “01”, and “50” product versions.
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For example, the default USB profile configuration which provides 2 functions (1 RNDIS for Ethernet-over-USB
and 1 CDC-ACM for AT commands and data) can be changed by means of the AT+UUSBCONF command
switching to a USB profile configuration which provides the following 6 functions:

3 CDC-ACM for AT commands and data

1 CDC-ACM for GNSS tunneling

1 CDC-ACM for SIM Access Profile (SAP)

1 CDC-ACM for diagnostic
As each USB profile of TOBY-L2 and MPCI-L2 modules identifies itself by its specific VID and PID combination
included in the USB device descriptor according to the USB 2.0 specifications [6], the VID and PID combination
changes as following by switching the active USB profile configuration to the set of 6 functions described above:

VID = 0x1546

PID = 0x1141
Alternatively, as another example, the USB profile configuration can be changed by means of the
AT+UUSBCONF command switching to a USB profile configuration which provides the following 4 functions:

1 CDC-ECM for Ethernet-over-USB
 3 CDC-ACM for AT commands and data
In case of this USB profile with the set of 4 functions described above, the VID and PID are the following:

VID = 0x1546

PID = 0x1143
The switch of the active USB profile selected by the AT+UUSBCONF command is not performed immediately.
The settings are saved in the non-volatile memory of the module at the power off, and the new configuration is
effective at the subsequent reboot of the module.
If the USB is connected to the host before the module is switched on, or if the module is reset (rebooted) with
the USB connected to the host, the VID and PID are automatically updated during the boot of the module. First,
VID and PID are the following:

VID = 0x1546

PID = 0x1140
This VID and PID combination identifies a USB profile where no USB function described above is available: AT
commands must not be sent to the module over the USB profile identified by this VID and PID combination.
Then, after a time period (roughly 20 s, depending on the host / device enumeration timings), the VID and PID
are updated to the ones related to the USB profile selected by the AT+UUSBCONF command.
For more details regarding the TOBY-L2 and MPCI-L2 series modules USB configurations and capabilities,
see the u-blox AT Commands Manual [3], +UUSBCONF AT command.
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1.9.1.2 USB in Windows
The USB drivers (INF files) are provided for Windows systems and should be installed properly by following the
step-by-step instruction in EVK-L20 / EVK-L21 User Guide [4].
USB drivers are available for the following operating system platforms:

Windows Vista

Windows 7

Windows 8

Windows 8.1
 Windows Embedded Compact 7
The module firmware can be upgraded over the USB interface by means of the FOAT feature, or using the u-blox
EasyFlash tool (for more details see Firmware Update Application Note [4]).
1.9.1.3
USB in Linux/Android
It is not required to install a specific driver for each Linux-based or Android-based operating system (OS) to use
the module USB interface, which is compatible with standard Linux/Android USB kernel drivers.
The full capability and configuration of the module USB interface can be reported by running “lsusb –v” or an
equivalent command available in the host operating system when the module is connected.
1.9.1.4
USB and power saving
The modules automatically enter the USB suspended state when the device has observed no bus traffic for a
specific time period according to the USB 2.0 specification [6]. In suspended state, the module maintains any
USB internal status as device. In addition, the module enters the suspended state when the hub port it is
attached to is disabled. This is referred to as USB selective suspend.
If the USB is suspended and a power saving configuration is enabled by the AT+UPSV command, the module
automatically enters the low power idle-mode whenever possible but it wakes up to active-mode according to
any required activity related to the network (e.g. the periodic paging reception described in section 1.5.1.5) or
any other required activity related to the functions / interfaces of the module.
The USB exits suspend mode when there is bus activity. If the USB is connected and not suspended, the module
is forced to stay in active-mode, therefore the AT+UPSV settings are overruled but they have effect on the power
saving configuration of the other interfaces.
The modules are capable of USB remote wake-up signaling: i.e. it may request the host to exit suspend mode or
selective suspend by using electrical signaling to indicate remote wake-up, for example due to incoming call,
URCs, data reception on a socket. The remote wake-up signaling notifies the host that it should resume from its
suspended mode, if necessary, and service the external event. Remote wake-up is accomplished using electrical
signaling described in the USB 2.0 specifications [6].
For the module current consumption description with power saving enabled and USB suspended, or with power
saving disabled and USB not suspended, see the sections 1.5.1.5, 1.5.1.6 and the TOBY-L2 Data Sheet [1] or the
MPCI-L2 Data Sheet [2].
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1.9.2 Asynchronous serial interface (UART)
The UART interface is not available on MPCI-L2 series modules.
The UART interface is not supported by TOBY-L200-00S and TOBY-L210-00S modules versions.
The DTR, DSR and DCD signals are not supported by TOBY-L200-50S, TOBY-L210-50S modules versions.
1.9.2.1
UART features
The UART interface is a 9-wire 1.8 V unbalanced asynchronous serial interface (UART) that can be connected to
an application host processor for AT commands and data communication.
The module firmware can be upgraded over the UART interface by means of the Firmware upgrade over AT
(FOAT) feature only: for more details see section 1.15 and Firmware update application note [4].
UART interface provides RS-232 functionality conforming to the ITU-T V.24 Recommendation [7], with CMOS
compatible signal levels: 0 V for low data bit or ON state, and 1.8 V for high data bit or OFF state (for detailed
electrical characteristics see TOBY-L2 Data Sheet [1]), providing:

data lines (RXD as output, TXD as input),

hardware flow control lines (CTS as output, RTS as input),

modem status and control lines (DTR as input, DSR as output, DCD as output, RI as output).
TOBY-L2 modules are designed to operate as LTE/3G/2G cellular modems, i.e. as the data circuit-terminating
equipment (DCE) according to the ITU-T V.24 Recommendation [7]. A host application processor connected to
the module through the UART interface represents the data terminal equipment (DTE).
UART signal names of TOBY-L2 modules conform to the ITU-T V.24 Recommendation [7]: e.g. TXD line
represents data transmitted by the DTE (host processor output) and received by the DCE (module input).
The UART interface is controlled and operated with:

AT commands according to 3GPP TS 27.007 [8], 3GPP TS 27.005 [9], 3GPP TS 27.010 [10]

u-blox AT commands
For the complete list of supported AT commands and their syntax see u-blox AT Commands Manual [3],
and in particular for the UART configuration see the +IPR, +ICF, +IFC, &K, \Q, +UPSV AT commands.
Flow control handshakes are supported by the UART interface and can be set by appropriate AT commands (see
u-blox AT Commands Manual [3], &K, +IFC, \Q AT commands): hardware flow control (over the RTS / CTS lines),
software flow control (XON/XOFF), or none flow control.
Hardware flow control is enabled by default.
Software flow control is not supported by “00”, “01” and “50” module product versions.
The one-shot autobauding is supported: the automatic baud rate detection is performed only once, at module
start up. After the detection, the module works at the detected baud rate and the baud rate can only be
changed by AT command (see u-blox AT Commands Manual [3], +IPR).
One-shot automatic baud rate recognition (autobauding) is enabled by default.
The automatic baud rate recognition (autobauding) is not supported by “50” product version.
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The following baud rates can be configured by AT command (see u-blox AT Commands Manual [3], +IPR):

9600 b/s

19200 b/s

38400 b/s

57600 b/s

115200 b/s, default value for “50” modules product version or when one-shot autobauding is disabled

230400 b/s

460800 b/s

921600 b/s
The following frame formats can be configured by AT command (see u-blox AT Commands Manual [3], +ICF):

8N2 (8 data bits, no parity, 2 stop bits)

8N1 (8 data bits, no parity, 1 stop bit), default frame format

8E1 (8 data bits, even parity, 1 stop bit)

8O1 (8 data bits, odd parity, 1 stop bit)

7N2 (7 data bits, no parity, 2 stop bits)

7N1 (7 data bits, no parity, 1 stop bit)

7E1 (7 data bits, even parity, 1 stop bit)

7O1 (7 data bits, odd parity, 1 stop bit)
Automatic frame format recognition is not supported by “00”, “01” and “50” module product versions.
Figure 20 describes the 8N1 frame format, which is the default frame format configuration.
Normal Transfer, 8N1
Start of 1-Byte
transfer
D0
D1
Possible Start of
next transfer
D2
D3
D4
D5
Start Bit
(Always 0)
D6
D7
Stop Bit
(Always 1)
tbit = 1/(Baudrate)
Figure 20: Description of UART default frame format (8N1, i.e. 8 data bits, no parity, 1 stop bit)
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1.9.2.2 UART interface configuration
The UART interface of TOBY-L2 series modules is available as AT command interface with the default
configuration described in Table 11 (for more details and information about further settings, see the u-blox AT
Commands Manual [3]).
Interface
AT Settings
Comments
UART interface
AT interface: enabled
AT command interface is enabled by default on the UART physical interface
AT+IPR=0
AT+IPR=115200
One-shot autobauding enabled by default on the modules, except “50” product version.
115200 b/s baud rate enabled by default on “50” modules product version.
AT+ICF=3,1
8N1 frame format enabled by default
AT&K3
HW flow control enabled by default
AT&S1
DSR line (Circuit 107 in ITU-T V.24) set ON in data mode4 and set OFF in command mode7
AT&D1
Upon an ON-to-OFF transition of DTR line (Circuit 108/2 in ITU-T V.24), the module (DCE)
enters online command mode7 and issues an OK result code
AT&C1
DCD line (Circuit 109 in ITU-T V.24) changes in accordance with the Carrier detect status;
ON if the Carrier is detected, OFF otherwise
MUX protocol: disabled
Multiplexing mode is disabled by default and it can be enabled by AT+CMUX command.
For more details, see the Mux Implementation Application Note [11].
The following virtual channels are defined:

Channel 0: Control channel

Channel 1 – 5: AT commands / data connection

Channel 6: GNSS tunneling (not supported by “00”, “01”, “50” product versions)

Channel 7: SIM Access Profile (not supported by “00”, “01”, “50” product versions)
Table 11: Default UART interface configuration
1.9.2.3 UART signals behavior
At the module switch-on, before the UART interface initialization (as described in the power-on sequence
reported in Figure 14), each pin is first tri-stated and then is set to its relative internal reset state . At the end of
the boot sequence, the UART interface is initialized, the module is by default in active-mode, and the UART
interface is enabled as AT commands interface.
The configuration and the behavior of the UART signals after the boot sequence are described below. See
section 1.4 for definition and description of module operating modes referred to in this section.
RXD signal behavior
The module data output line (RXD) is set by default to the OFF state (high level) at UART initialization. The
module holds RXD in the OFF state until the module does not transmit some data.
TXD signal behavior
The module data input line (TXD) is set by default to the OFF state (high level) at UART initialization. The TXD
line is then held by the module in the OFF state if the line is not activated by the DTE: an active pull-up is enabled
inside the module on the TXD input.
For the definition of the interface data mode, command mode and online command mode see the u-blox AT Commands Manual [3]
See the pin description table in the TOBY-L2 series Data Sheet [1]
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CTS signal behavior
The module hardware flow control output (CTS line) is set to the ON state (low level) at UART initialization.
If the hardware flow control is enabled, as it is by default, the CTS line indicates when the UART interface is
enabled (data can be sent and received). The module drives the CTS line to the ON state or to the OFF state
when it is either able or not able to accept data from the DTE over the UART interface (for more details see
section 1.9.2.4 and in particular Figure 22).
If hardware flow control is enabled, then when the CTS line is OFF it does not necessarily mean that the
module is in low power idle-mode, but only that the UART is not enabled, as the module could be forced
to stay in active-mode for other activities, e.g. related to the network or related to other interfaces.
If hardware flow control is enabled and the multiplexer protocol is active, then the CTS line state is
mapped to FCon / FCoff MUX command for flow control matters outside the power saving configuration
while the physical CTS line is still used as a UART power state indicator. For more details, see the Mux
Implementation Application Note [11].
The CTS hardware flow control setting can be changed by AT commands (for more details, see the u-blox AT
Commands Manual [3], AT&K, AT\Q, AT+IFC AT commands).
If the hardware flow control is not enabled, the CTS line still indicates when the UART interface is enabled, as it
does when hardware flow control is enabled. The module drives the CTS line to the ON state or to the OFF state
when it is either able or not able to accept data from the DTE over the UART interface, as described in Figure 22.
When the power saving configuration is enabled by AT+UPSV command and the hardware flow-control is
not implemented in the DTE/DCE connection, data sent by the DTE can be lost: the first character sent
when the module is in low power idle-mode will not be a valid communication character (see section
1.9.2.4 and in particular the sub-section “Wake up via data reception” for further details).
RTS signal behavior
The hardware flow control input (RTS line) is set by default to the OFF state (high level) at UART initialization.
The module then holds the RTS line in the OFF state if the line is not activated by the DTE: an active pull-up is
enabled inside the module on the RTS input.
If the HW flow control is enabled, as it is by default, the module monitors the RTS line to detect permission from
the DTE to send data to the DTE itself. If the RTS line is set to the OFF state, any on-going data transmission
from the module is interrupted until the RTS line changes to the ON state.
The DTE must still be able to accept a certain number of characters after the RTS line is set to the OFF
state: the module guarantees the transmission interruption within two characters from RTS state change.
The module behavior according to the RTS hardware flow control status can be configured by AT commands
(for more details, see the u-blox AT Commands Manual [3], AT&K, AT\Q, AT+IFC AT commands).
If AT+UPSV=2 is set and HW flow control is disabled, the module monitors the RTS line to manage the power
saving configuration (for more details, see section 1.9.2.4 and u-blox AT Commands Manual [3], AT+UPSV):

When an OFF-to-ON transition occurs on the RTS input, the UART is enabled and the module is forced to
active-mode; after ~5 ms from the transition the switch is completed and data can be received without loss.
The module cannot enter low power idle-mode and the UART is keep enabled as long as the RTS input line
is held in the ON state

If the RTS input line is set to the OFF state by the DTE, the UART is disabled (held in low power mode) and
the module automatically enters low power idle-mode whenever possible
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DSR signal behavior
If AT&S1 is set, as it is by default, the DSR module output line is set by default to the OFF state (high level) at
UART initialization. The DSR line is then set to the OFF state when the module is in command mode or in online
command mode and is set to the ON state when the module is in data mode .
If AT&S0 is set, the DSR module output line is set by default to the ON state (low level) at UART initialization and
is then always held in the ON state.
DTR signal behavior
The DTR module input line is set by default to the OFF state (high level) at UART initialization. The module then
holds the DTR line in the OFF state if the line is not activated by the DTE: an active pull-up is enabled inside the
module on the DTR input.
Module behavior according to DTR status can be changed by AT command configuration (for more details see
the u-blox AT Commands Manual [3], &D AT command description).
If AT+UPSV=3 is set, the DTR line is monitored by the module to manage the power saving configuration (for
more details, see section 1.9.2.4 and u-blox AT Commands Manual [3], AT+UPSV):

When an OFF-to-ON transition occurs on the DTR input, the UART is enabled and the module is forced to
active-mode; after ~5 ms from the transition, the switch is completed and data can be received without loss.
The module cannot enter low power idle-mode and the UART is keep enabled as long as the DTR input line
is held in the ON state

If the DTR input line is set to the OFF state by the DTE, the UART is disabled (held in low power mode) and
the module automatically enters low power idle-mode whenever possible
DCD signal behavior
If AT&C1 is set, as it is by default, the DCD module output line is set by default to the OFF state (high level) at
UART initialization. The module then sets the DCD line according to the carrier detect status: ON if the carrier is
detected, OFF otherwise.
If a Packet Switched Data call occurs before activating the PPP protocol (data mode), a dial-up application must
provide the ATD*99***# to the module: with this command the module switches from
command mode to data mode and can accept PPP packets. The module sets the DCD line to the ON state,
then answers with a CONNECT to confirm the ATD*99 command. The DCD ON is not related to the context
activation but with the data mode.
The DCD is set to ON during the execution of the +CMGS, +CMGW, +USOWR, +USODL AT commands
requiring input data from the DTE: the DCD line is set to the ON state as soon as the switch to binary/text
input mode is completed and the prompt is issued; DCD line is set to OFF as soon as the input mode is
interrupted or completed (for more details see the u-blox AT Commands Manual [3]).
The DCD line is kept in the ON state, even during the online command mode , to indicate that the data
call is still established even if suspended, while if the module enters command mode , the DSR line is set
to the OFF state. For more details see DSR signal behavior description.
For scenarios when the DCD line setting is requested for different reasons (e.g. SMS texting during online
command mode ), the DCD line changes to guarantee the correct behavior for all the scenarios. For
example, in case of SMS texting in online command mode , if the data call is released, DCD is kept ON till
the SMS command execution is completed (even if the data call release would request DCD set OFF).
If AT&C0 is set, the DCD module output line is set by default to the ON state (low level) at UART initialization
and is then always held in the ON state.
For the definition of the interface data mode, command mode and online command mode see the u-blox AT Commands Manual [3]
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RI signal behavior
The RI module output line is set by default to the OFF state (high level) at UART initialization.
The RI output line can notify an SMS arrival. When the SMS arrives, the RI line switches from OFF to ON for 1 s
(see Figure 21), if the feature is enabled by the proper AT command (see the u-blox AT Commands Manual [3],
AT+CNMI command).
1s
RI OFF
RI ON
time [s]
SMS arrives
Figure 21: RI behavior at SMS arrival
This behavior allows the DTE to stay in power saving mode until the DCE related event requests service.
For SMS arrival, if several events coincidently occur or in quick succession each event independently triggers the
RI line, although the line will not be deactivated between each event. As a result, the RI line may stay to ON for
more than 1 s, so that:
RI line monitoring cannot be used by the DTE to determine the number of received SMSes.
For multiple events, the RI line cannot be used to discriminate the two events, but the DTE must rely on
the subsequent URCs and interrogate the DCE with the proper commands.
1.9.2.4
UART and power-saving
The power saving configuration is controlled by the AT+UPSV command (for the complete description, see the
u-blox AT Commands Manual [3]). When power saving is enabled, the module automatically enters low power
idle-mode whenever possible, and otherwise the active-mode is maintained by the module (see section 1.4 for
definition and description of module operating modes referred to in this section).
The AT+UPSV command configures both the module power saving and also the UART behavior in relation to the
power saving. The conditions for the module entering low power idle-mode also depend on the UART power
saving configuration, as the module does not enter the low power idle-mode according to any required activity
related to the network (within or outside an active call) or any other required concurrent activity related to the
functions and interfaces of the module, including the UART interface.
The AT+UPSV command can set these different power saving configurations:

AT+UPSV=0, power saving disabled (default configuration)

AT+UPSV=1, power saving enabled cyclically

AT+UPSV=2, power saving enabled and controlled by the UART RTS input line

AT+UPSV=3, power saving enabled and controlled by the UART DTR input line
The different power saving configurations that can be set by the +UPSV AT command are described in details in
the following subsections. Table 12 summarizes the UART interface communication process in the different
power saving configurations, in relation with the hardware flow control settings and the RTS input line status.
For more details on the +UPSV AT command description, see u-blox AT commands Manual [3].
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AT+UPSV HW flow control
RTS line
DTR line
Communication during idle-mode and wake up
Enabled (AT&K3)
ON
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE.
Enabled (AT&K3)
OFF
ON or OFF
Disabled (AT&K0)
ON or OFF
ON or OFF
Enabled (AT&K3)
ON
ON or OFF
Enabled (AT&K3)
OFF
ON or OFF
Disabled (AT&K0)
ON or OFF
ON or OFF
Enabled (AT&K3)
Disabled (AT&K0)
ON or OFF
ON
ON or OFF
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise the data is lost.
Data sent by the DTE is buffered by the DTE and will be correctly received by
the module when it is ready to receive data (when the UART is enabled).
Data sent by the module is correctly received by the DTE.
Data sent by the DTE is buffered by the DTE and will be correctly received by
the module when it is ready to receive data (when the UART is enabled).
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
The first character sent by the DTE is lost by the module, but after ~5 ms the
UART and the module are woken up: recognition of subsequent characters is
guaranteed only after the UART / module complete wake-up (i.e. after ~5 ms).
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise the data is lost.
Not Applicable: HW flow control cannot be enabled with AT+UPSV=2.
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
Disabled (AT&K0)
OFF
ON or OFF
The first character sent by the DTE is lost by the module, but after ~5 ms the
UART and the module are woken up. Recognition of subsequent characters is
guaranteed only after the UART / module complete wake-up (i.e. after ~5 ms).
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
Enabled (AT&K3)
ON
ON
Enabled (AT&K3)
ON
OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE.
Data sent by the DTE is buffered by the DTE and will be correctly received by
the module when it is ready to receive data (when the UART is enabled).
Data sent by the module is correctly received by the DTE.
Enabled (AT&K3)
OFF
ON
Enabled (AT&K3)
OFF
OFF
Disabled (AT&K0)
ON or OFF
ON
Disabled (AT&K0)
ON or OFF
OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
Data sent by the DTE is buffered by the DTE and will be correctly received by
the module when it is ready to receive data (when the UART is enabled).
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
The first character sent by the DTE is lost by the module, but after ~5 ms the
UART and the module are woken up. Recognition of subsequent characters is
guaranteed only after the UART / module complete wake-up (i.e. after ~5 ms).
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
Table 12: UART and power-saving summary
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AT+UPSV=0: power saving disabled, fixed active-mode
The module does not enter low power idle-mode and the UART interface is enabled (data can be sent and
received): the CTS line is always held in the ON state after UART initialization. This is the default configuration.
AT+UPSV=1: power saving enabled, cyclic idle/active-mode
When the AT+UPSV=1 command is issued by the DTE, then the UART is immediately disabled by the module.
Afterwards, the UART is enabled again, and the module does not enter low power idle-mode, as following:

Periodically, during each paging reception (see section 1.5.1.5), to temporarily receive or send data over the
UART, e.g. data buffered by the DTE with HW flow control enabled will be correctly received by the module

If the module needs to transmit some data over the UART (e.g. URC), the UART is temporarily enabled

If a data call with external context is activated, the UART is kept enabled

If the DTE send data with HW flow control disabled, the first character sent causes the UART and module
wake-up after ~5 ms: recognition of subsequent characters is guaranteed only after the complete wake-up
(see the following subsection “wake up via data reception”)
The module automatically enters the low power idle-mode whenever possible but it wakes up to active-mode
according to the UART periodic wake up so that the module cyclically enters the low power idle-mode and the
active-mode. Additionally, the module wakes up to active-mode according to any required activity related to the
network (e.g. for the periodic paging reception described in section 1.5.1.5, or for any other required RF Tx / Rx)
or any other required activity related to module functions / interfaces (including the UART itself).
When the UART interface is enabled, data can be received. When a character is received, it forces the UART
interface to stay enabled for a longer time and it forces the module to stay in the active-mode for a longer time,
according to the timeout configured by the second parameter of the +UPSV AT command. The timeout can be
set from 40 2G-frames (i.e. 40 x 4.615 ms = 184 ms) up to 65000 2G-frames (i.e. 65000 x 4.615 ms = 300 s).
Default value is 2000 2G-frames (i.e. 2000 x 4.615 ms = 9.2 s). Every subsequent character received during the
active-mode, resets and restarts the timer; hence the active-mode duration can be extended indefinitely.
The hardware flow-control output (CTS line) indicates when the UART interface is enabled (data can be sent and
received), as illustrated in Figure 22.
Data input
CTS OFF
CTS ON
time [s]
2G: 0.45-2.10 s
3G: 0.62-5.10 s
LTE: 0.30-2.52 s
~ 20 ms
~9.2 s (default)
UART disabled
UART enabled
UART enabled
Figure 22: CTS output pin indicates when module’s UART is enabled (CTS = ON = low level) or disabled (CTS = OFF = high level)
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AT+UPSV=2: power saving enabled and controlled by the RTS line
This configuration can only be enabled with the module hardware flow control disabled (i.e. AT&K0 setting).
The UART interface is immediately disabled after the DTE sets the RTS line to OFF.
Afterwards, the UART is enabled again, and the module does not enter low power idle-mode, as following:

If an OFF-to-ON transition occurs on the RTS input line, this causes the UART / module wake-up after ~5 ms:
recognition of subsequent characters is guaranteed only after the complete wake-up, and the UART is kept
enabled as long as the RTS input line is set to ON.

If the module needs to transmit some data over the UART (e.g. URC)

If a data call with external context is activated

If the DTE sends data, the first character sent causes the UART and module wake-up after ~5 ms: the
recognition of subsequent characters is guaranteed only after the complete wake-up, and the UART will be
then kept enabled after the last data received according to the timeout previously set with the AT+UPSV=1
configuration (see the following subsection “wake up via data reception”)
The module automatically enters the low power idle-mode whenever possible but it wakes up to active-mode
according to any required activity related to the network (e.g. for the periodic paging reception described in
section 1.5.1.5, or for any other required RF transmission / reception) or any other required activity related to the
module functions / interfaces (including the UART itself).
The hardware flow-control output (CTS line) indicates when the UART interface is enabled (data can be sent and
received) as illustrated in Figure 22, even if hardware flow control is disabled with AT+UPSV=2 configuration.
AT+UPSV=3: power saving enabled and controlled by the DTR line
The UART interface is immediately disabled after the DTE sets the DTR line to OFF.
Afterwards, the UART is enabled again, and the module does not enter low power idle-mode, as following:

If an OFF-to-ON transition occurs on the DTR input line, this causes the UART / module wake-up after ~5
ms: recognition of subsequent characters is guaranteed only after the complete wake-up, and the UART is
kept enabled as long as the DTR input line is set to ON

If the module needs to transmit some data over the UART (e.g. URC)

If a data call with external context is activated

If the DTE sends data, the first character sent causes the UART and module wake-up after ~5 ms:
recognition of subsequent characters is guaranteed only after the complete wake-up, and the UART will be
then kept enabled after the last data received according to the timeout previously set with the AT+UPSV=1
configuration (see the following subsection “wake up via data reception”)
The module automatically enters the low power idle-mode whenever possible but it wakes up to active-mode
according to any required activity related to the network (e.g. for the periodic paging reception described in
section 1.5.1.5, or for any other required RF signal transmission or reception) or any other required activity
related to the functions / interfaces of the module.
The AT+UPSV=3 configuration can be enabled regardless the flow control setting on UART. In particular, the HW
flow control can be enabled (AT&K3) or disabled (AT&K0) on UART during this configuration. In both cases, the
CTS line indicates the UART power saving state as illustrated in Figure 22.
When the AT+UPSV=3 configuration is enabled, the DTR input line can still be used by the DTE to control the
module behavior according to AT&D command configuration (see u-blox AT commands Manual [3]).
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Wake up via data reception
The UART wake up via data reception consists of a special configuration of the module TXD input line that
causes the system wake-up when a low-to-high transition occurs on the TXD input line. In particular, the UART
is enabled and the module switches from the low power idle-mode to active-mode within ~5 ms from the first
character received: this is the system “wake up time”.
As a consequence, the first character sent by the DTE when the UART is disabled (i.e. the wake up character) is
not a valid communication character even if the wake up via data reception configuration is active, because it
cannot be recognized, and the recognition of the subsequent characters is guaranteed only after the complete
system wake-up (i.e. after ~5 ms).
The TXD input line is configured to wake up the system via data reception in the following cases:

AT+UPSV=1 is set with HW flow control disabled

AT+UPSV=2 is set with HW flow control disabled, and the RTS line is set OFF

AT+UPSV=3 is set with HW flow control disabled, and the DTR line is set OFF
Figure 23 and Figure 24 show examples of common scenarios and timing constraints:

AT+UPSV=1 power saving configuration is active and the timeout from last data received to idle-mode start
is set to 2000 frames (AT+UPSV=1,2000)

Hardware flow control is disabled
Figure 23 shows the case where the module UART is disabled and only a wake-up is forced. In this scenario the
only character sent by the DTE is the wake-up character; as a consequence, the DCE module UART is disabled
when the timeout from last data received expires (2000 frames without data reception, as the default case).
UART
DCE UART is enabled for 2000 GSM frames (~9.2 s)
OFF
ON
time
TXD input
Wake up time: ~5 ms
OFF
ON
Wake up character
Not recognized by DCE
time
Figure 23: Wake-up via data reception without further communication
Figure 24 shows the case where in addition to the wake-up character further (valid) characters are sent. The
wake up character wakes-up the module UART. The other characters must be sent after the “wake up time” of
~5 ms. If this condition is satisfied, the module (DCE) recognizes characters. The module will disable the UART
after 2000 GSM frames from the latest data reception.
UART
DCE UART is enabled for 2000 GSM frames (~9.2s)
after the last data received
OFF
ON
TXD input
Wake up time: ~5 ms
time
OFF
ON
Wake up character
Not recognized by DCE
Valid characters
Recognized by DCE
time
Figure 24: Wake-up via data reception with further communication
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The “wake-up via data reception” feature cannot be disabled.
In command mode , if autobauding is enabled and the DTE does not implement HW flow control, the DTE
must always send a character to the module before the “AT” prefix set at the beginning of each
command line: the first character is ignored if the module is in active-mode, or it represents the wake-up
character if the module is in idle-mode.
In command mode , the DTE should always send a dummy “AT” before each command line: the first
character is not ignored if the module is in active-mode (i.e. the module replies “OK”), or it represents the
wake up character if the module is in low power idle-mode (i.e. the module does not reply).
No wake-up character or dummy “AT” is required from the DTE during a data call with external context
since the module UART interface continues to be enabled and does not need to be woken-up.
Furthermore in data mode a dummy “AT” would affect the data communication.
Additional considerations
If the USB is connected and not suspended, the module is forced to stay in active-mode, therefore the AT+UPSV
settings are overruled but they have effect on the UART behavior (they configure UART power saving, so that
UART is enabled / disabled according to the AT+UPSV settings).
1.9.2.5
UART multiplexer protocol
TOBY-L2 series modules include multiplexer functionality as per 3GPP TS 27.010 [10], on the UART physical link.
This is a data link protocol which uses HDLC-like framing and operates between the module (DCE) and the
application processor (DTE) and allows a number of simultaneous sessions over the used physical link (UART): the
user can concurrently use AT interface on one MUX channel and data communication on another MUX channel.
The following virtual channels are defined (for more details, see Mux implementation Application Note [11]):

Channel 0: control channel

Channel 1 – 5: AT commands / data connection

Channel 6: GNSS tunneling (not supported by “00”, “01”, “50” product versions)

Channel 7: SIM Access Profile (SAP, not supported by “00”, “01”, “50” product versions)
See the u-blox AT Commands Manual [3] for the definition of the interface data mode, command mode and online command mode.
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1.9.3 DDC (I2C) interface
The I C bus compatible Display Data Channel interface is not available on the MPCI-L2 series modules, as
®
AssistNow embedded GNSS positioning aiding, CellLocate positioning through cellular information and
custom functions over GPIOs for the integration with u-blox positioning chips / modules.
The I C bus compatible Display Data Channel interface is not supported by the TOBY-L2 series modules
®
“00”, “01” and “50” product versions, as the AssistNow embedded GNSS positioning aiding, CellLocate
positioning through cellular information and custom functions over GPIOs for the integration with u-blox
positioning chips / modules.
The SDA and SCL pins of TOBY-L2 series modules represent an I C bus compatible Display Data Channel (DDC)
interface for the communication with u-blox GNSS receivers and with other external I C devices as audio codecs:
an I C master can communicate with more I C slaves in accordance to the I C bus specifications [12].
The DDC (I C) interface is the only one interface dedicated for communication between u-blox cellular module
and u-blox positioning receivers. The AT commands interface is not available on the DDC (I C) interface.
The DDC (I C) interface pads of the module, serial data (SDA) and serial clock (SCL), are open drain output and
external pull up resistors must be used conforming to the I C bus specifications [12].
u-blox has implemented special features in the cellular modules to ease the design effort for the integration of a
u-blox cellular module with a u-blox GNSS receiver (details in GNSS Implementation Application Note [13]).
Combining a u-blox cellular module with a u-blox GNSS receiver allows designers to full access the GNSS receiver
directly via the cellular module: it relays control messages to the GNSS receiver via a dedicated DDC (I C)
nd
interface. A 2 interface connected to the GNSS receiver is not necessary: AT commands via the AT interfaces of
the cellular module (UART, USB) allows a full control of the GNSS receiver from any host processor.
u-blox cellular modules feature embedded GNSS aiding that is a set of specific features developed by u-blox to
enhance GNSS performance, decreasing Time To First Fix (TTFF), thus allowing to calculate the position in a
shorter time with higher accuracy.
Additional custom functions over GPIO pins are designed to improve the integration with u-blox GNSS receivers:

GNSS receiver power-on/off: “GNSS supply enable” function over the GPIO2 pin improves the positioning
receiver power consumption. When the GNSS functionality is not required, the positioning receiver can be
completely switched off by the cellular module controlled by the application processor over AT commands

The wake up from idle-mode when the GNSS receiver is ready to send data: “GNSS data ready” function
over the GPIO3 pin improves the cellular module power consumption. When power saving is enabled in the
cellular module by the AT+UPSV command and the GNSS receiver does not send data by the DDC (I C)
interface, the module automatically enters idle-mode whenever possible. With the “GNSS data ready”
function the GNSS receiver can indicate to the cellular module that it is ready to send data: the positioning
receiver can wake up the cellular module to avoid data loss even if power saving is enabled.

The RTC synchronization signal to the GNSS receiver: “GNSS RTC sharing” function over the GPIO4 pin
improves GNSS receiver performance, decreasing the Time To First Fix (TTFF), and thus allowing to calculate
the position in a shorter time with higher accuracy. When GNSS local aiding is enabled, the cellular module
automatically uploads data such as position, time, ephemeris, almanac, health and ionospheric parameter
from the positioning receiver into its local memory, and restores this to the GNSS receiver at the next power
up of the positioning receiver
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1.9.4 Secure Digital Input Output interface (SDIO)
Secure Digital Input Output interface is not available on MPCI-L2 series modules.
Secure Digital Input Output interface is not supported by TOBY-L2 “00” and “01” product versions.
TOBY-L2 series modules include a 4-bit Secure Digital Input Output interface (SDIO_D0, SDIO_D1, SDIO_D2,
SDIO_D3, SDIO_CLK, SDIO_CMD) designed to communicate with an external u-blox short range Wi-Fi module:
the TOBY-L2 cellular module acts as an SDIO host controller which can communicate over the SDIO bus with a
compatible u-blox short range Wi-Fi module acting as SDIO device.
The SDIO interface is the only one interface of TOBY-L2 series modules dedicated for communication between
the u-blox cellular module and the u-blox short range Wi-Fi module. The AT commands interface is not available
on the SDIO interface of TOBY-L2 series modules.
The SDIO interface supports 50 MHz bus clock frequency, which allows a data throughput of 200 Mb/s.
Combining a u-blox cellular module with a u-blox short range communication module gives designers full access
to the Wi-Fi module directly via the cellular module, so that a second interface connected to the Wi-Fi module is
not necessary. AT commands via the AT interfaces of the cellular module (UART, USB) allows a full control of the
Wi-Fi module from any host processor, because Wi-Fi control messages are relayed to the Wi-Fi module via the
dedicated SDIO interface (for more details, see the Wi-Fi AT commands in the u-blox AT Commands Manual [3]).
u-blox has implemented special features in the cellular modules to ease the design effort for the integration of a
u-blox cellular module with a u-blox short range Wi-Fi module to provide both Bridge and Router functionality
(for more details, see the Wi-Fi / Cellular Integration Application Note [14]).
Additional custom functions over GPIO pins are designed to improve the integration with u-blox Wi-Fi modules:

Wi-Fi enable
Switch-on / switch-off the Wi-Fi

Wi-Fi reset
Reset the Wi-Fi

Wi-Fi data ready
Cellular module wake-up when the Wi-Fi is ready for sending data over SDIO

Wi-Fi power saving Enable/disable the low power mode of the Wi-Fi

32 kHz output
Clock for the Wi-Fi

26 MHz output
Clock for the Wi-Fi
GPIOs are not supported by TOBY-L2 “00”, “01”, and “50” product versions, except for:

Wireless Wide Area Network status indication configured on GPIO1 of “00”, “01” product
versions

Wi-Fi enable function configured on the GPIO1 of “50“ product version
GPIOs are not available on MPCI-L2 series modules.
1.10 Audio
1.10.1 Digital audio over I2S interface
Digital audio over I S interface is not available on MPCI-L2 series modules.
Digital audio over I S interface is not supported by TOBY-L2 modules ”00”, “01”, “50” product versions.
TOBY-L2 series modules include a 4-wire I S digital audio interface (I2S_TXD, I2S_RXD, I2S_CLK, I2S_WA) that
can be configured by AT command to transfer digital audio data with an external device as an audio codec (for
more details see u-blox AT Commands Manual [3]).
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1.11 General Purpose Input/Output
GPIOs are not supported by TOBY-L2 series modules “00”, “01” and “50” product versions, except for:

Wireless Wide Area Network status indication configured on GPIO1 of “00”, “01” product
versions

Wi-Fi enable function configured on the GPIO1 of “50” product version
GPIOs are not available on MPCI-L2 series modules.
TOBY-L2 series modules include 14 pins (GPIO1-GPIO6, I2S_TXD, I2S_RXD, I2S_CLK, I2S_WA, DTR, DSR,
DCD, RI) that can be configured as General Purpose Input/Output or to provide custom functions via u-blox AT
commands (see the u-blox AT Commands Manual [3]), as summarized in Table 13.
Function
Description
Default GPIO
Configurable GPIOs
Network status
indication
Network status: registered home network, registered
roaming, data transmission, no service
GPIO1
GPIO1
GNSS supply enable
Enable/disable the supply of u-blox GNSS receiver
connected to cellular module
GPIO2
GPIO2
GNSS data ready
Sense when u-blox GNSS receiver connected to the module
is ready for sending data by the DDC (I2C)
GPIO3
GPIO3
GNSS RTC sharing
Real Time Clock synchronization signal to u-blox GNSS
receiver connected to cellular module
GPIO4
GPIO4
SIM card detection
SIM card physical presence detection
GPIO5
GPIO5
SIM card hot
insertion/removal
SIM card hot insertion/removal
--
GPIO5
I2S digital audio interface
I2S digital audio interface
I2S_RXD, I2S_TXD,
I2S_CLK, I2S_WA
I2S_RXD, I2S_TXD,
I2S_CLK, I2S_WA
26 MHz clock output
26 MHz clock output for an external audio codec or an
external Wi-Fi chip/module
GPIO6
GPIO6
Wi-Fi enable
Enable/disable the supply of the external Wi-Fi chip or
module connected to the cellular module
--
GPIO1, GPIO4, DSR
Wi-Fi data ready
Sense when the external Wi-Fi chip/module connected to
the cellular module is ready for sending data by the SDIO,
waking up the cellular module from low power idle mode
--
GPIO3, DTR
Wi-Fi reset
Reset the external Wi-Fi chip or module connected to the
cellular module
--
GPIO3, DCD
Wi-Fi power saving
Enable/disable the low power mode of the external Wi-Fi
chip/module connected to the cellular module
--
GPIO2, RI
32 kHz clock output
32 kHz clock output for an external Wi-Fi chip or module
--
GPIO6
Antenna tuning
4-bit tunable antenna control signals mapping the actual
operating RF band over a 4-pin interface provided for the
implementation of external antenna tuning solutions
--
I2S_RXD, I2S_TXD,
I2S_CLK, I2S_WA
DSR, DTR, DCD, RI
DSR
UART data set ready output
DSR
DSR
DTR
UART data terminal ready input
DTR
DTR
DCD
UART data carrier detect output
DCD
DCD
RI
UART ring indicator output
RI
RI
General purpose input
Input to sense high or low digital level
--
All
General purpose output
Output to set the high or the low digital level
--
All
Pin disabled
Tri-state with an internal active pull-down enabled
--
All
Table 13: TOBY-L2 series GPIO custom functions configuration
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1.12 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)
Mini PCI Express specific signals (W_DISABLE#, LED_WWAN#) are not available on TOBY-L2 series.
MPCI-L2 series modules include the W_DISABLE# active-low input signal to disable the radio operations as
specified by the PCI Express Mini Card Electromechanical Specification [15].
As described in Figure 25, the W_DISABLE# input is equipped with an internal pull-up to the 3.3Vaux supply.
The W_DISABLE# input detailed electrical characteristics are described in the MPCI-L2 series Data Sheet [2].
MPCI-L2 series
Baseband
Processor
3.3Vaux
22k
W_DISABLE# 20
W_DISABLE#
Figure 25: MPCI-L2 series modules W_DISABLE# input circuit description
MPCI-L2 series modules include the LED_WWAN# active-low open drain output to provide the Wireless Wide
Area Network status indication as specified by the PCI Express Mini Card Electromechanical Specification [15].
For more electrical characteristics details see the MPCI-L2 Data Sheet [2].
1.13 Reserved pins (RSVD)
Pins reserved for future use, marked as RSVD, are not available on MPCI-L2 series.
TOBY-L2 series modules have pins reserved for future use, marked as RSVD: they can all be left unconnected on
the application board, except the RSVD pin number 6 that must be externally connected to ground.
1.14 Not connected pins (NC)
Pins internally not connected, marked as NC, are not available on TOBY-L2 series.
MPCI-L2 series modules have pins internally not connected, marked as NC: they can be left unconnected or they
can be connected on the application board according to any application requirement, given that none function is
provided by the modules over these pins.
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1.15 System features
1.15.1 Network indication
Network status indication over GPIO1 is not available on MPCI-L2 series modules which include the
LED_WWAN# active-low open drain output to provide the Wireless Wide Area Network status indication
as specified by the PCI Express Mini Card Electromechanical Specification [15].
GPIOs are not supported by TOBY-L2 modules “00”, “01”, “50” product versions, but the Wireless Wide
Area Network status indication is by default configured on the GPIO1 of “00”, “01” product version.
The GPIO1 can be configured by the AT+UGPIOC command (for further details see the u-blox AT Commands
Manual [3]), to indicate network status as described below:

No service (no network coverage or not registered)

Registered 2G / 3G / LTE home network

Registered 2G / 3G / LTE visitor network (roaming)

Call enabled (RF data transmission / reception)
1.15.2 Antenna supervisor
Antenna supervisor (i.e. antenna detection) is not available on MPCI-L2 series.
Antenna supervisor (i.e. antenna detection) is not supported by TOBY-L2 series modules “00”, “01” and
“50” product versions.
The antenna detection function provided by the ANT_DET pin is based on an ADC measurement as optional
feature that can be implemented if the application requires it. The antenna supervisor is forced by the +UANTR
AT command (see the u-blox AT Commands Manual [3] for more details).
The requirements to achieve antenna detection functionality are the following:

an RF antenna assembly with a built-in resistor (diagnostic circuit) must be used

an antenna detection circuit must be implemented on the application board
See section 1.7.2 for detailed antenna detection interface functional description and see section 2.4.2 for
detection circuit on application board and diagnostic circuit on antenna assembly design-in guidelines.
1.15.3 Jamming detection
Congestion detection (i.e. jamming detection) is not supported by “00”, “01” and “50” product versions.
In real network situations modules can experience various kind of out-of-coverage conditions: limited service
conditions when roaming to networks not supporting the specific SIM, limited service in cells which are not
suitable or barred due to operators’ choices, no cell condition when moving to poorly served or highly interfered
areas. In the latter case, interference can be artificially injected in the environment by a noise generator covering
a given spectrum, thus obscuring the operator’s carriers entitled to give access to the LTE/3G/2G service.
The congestion (i.e. jamming) detection feature can be enabled and configured by the +UCD AT command: the
feature consists of detecting an anomalous source of interference and signaling the start and stop of such
conditions to the host application processor with an unsolicited indication, which can react appropriately by e.g.
switching off the radio transceiver of the module (i.e. configuring the module in “airplane mode” by means of
the +CFUN AT command) in order to reduce power consumption and monitoring the environment at constant
periods (for more details see the u-blox AT Commands Manual [3]).
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1.15.4 IP modes of operation
IP modes of operation refer to the TOBY-L2 and MPCI-L2 series modules configuration related to the network IP
termination and network interfaces settings in general. IP modes of operation are the following:

Bridge mode: In bridge mode the module acts as a cellular modem dongle connected to the host over
serial interface. The IP termination of the network is placed on the host IP stack. The module is configured as
a bridge which means the network IP address is assigned to the host (host IP termination).

Router mode: In router mode the module acts as a cellular modem router which means the IP termination
of the network is placed on the internal IP stack of the module (on-target IP termination). In particular, in
this configuration the application processor belongs to a private network and is not aware of the mobile
connectivity setup of the module.
For more details about IP modes of operation see the u-blox AT Commands Manual [3].
1.15.5 Dual stack IPv4/IPv6
TOBY-L2 and MPCI-L2 series support both Internet Protocol version 4 and Internet Protocol version 6 in parallel.
For more details about dual stack IPv4/IPv6 see the u-blox AT Commands Manual [3].
1.15.6 TCP/IP and UDP/IP
Embedded TCP/IP and UDP/IP stack as well as Direct Link mode are not supported by the “00” and “50”
product versions.
TOBY-L2 and MPCI-L2 series modules provide embedded TCP/IP and UDP/IP protocol stack: a PDP context can be
configured, established and handled via the data connection management packet switched data commands.
TOBY-L2 and MPCI-L2 series modules provide Direct Link mode to establish a transparent end-to-end
communication with an already connected TCP or UDP socket via serial interfaces (USB, UART). In Direct Link
mode, data sent to the serial interface from an external application processor is forwarded to the network and
vice-versa.
For more details about embedded TCP/IP and UDP/IP functionalities see the u-blox AT Commands Manual [3].
1.15.7 FTP
Embedded FTP services as well as Direct Link mode are not supported by “00” and “50” product versions.
TOBY-L2 and MPCI-L2 series provide embedded File Transfer Protocol (FTP) services. Files are read and stored in
the local file system of the module.
FTP files can also be transferred using FTP Direct Link:

FTP download: data coming from the FTP server is forwarded to the host processor via USB / UART serial
interfaces (for FTP without Direct Link mode the data is always stored in the module’s Flash File System)

FTP upload: data coming from the host processor via USB / UART serial interface is forwarded to the FTP
server (for FTP without Direct Link mode the data is read from the module’s Flash File System)
When Direct Link is used for a FTP file transfer, only the file content pass through USB / UART serial interface,
whereas all the FTP commands handling is managed internally by the FTP application.
For more details about embedded FTP functionalities see u-blox AT Commands Manual [3].
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1.15.8 HTTP
Embedded HTTP services are not supported by “00” and “50” product versions.
TOBY-L2 and MPCI-L2 series modules provide the embedded Hyper-Text Transfer Protocol (HTTP) services via AT
commands for sending requests to a remote HTTP server, receiving the server response and transparently storing
it in the module’s Flash File System (FFS).
For more details about embedded HTTP functionalities see the u-blox AT Commands Manual [3].
1.15.9 SSL
Embedded Transport Layer Security (TLS) / Secure Sockets Layer (SSL) protocols are not supported by the
“00”, “01” and “50” product versions.
TOBY-L2 and MPCI-L2 series modules provide the Transport Layer Security (TLS) / Secure Sockets Layer (SSL)
encryption protocols to enable security over the FTP and HTTP protocols via AT commands, implementing Secure
File Transfer Protocol (FTPS, i.e. FTP with TLS / SSL encryption) and Secure Hyper-Text Transfer Protocol (HTTPS,
i.e. HTTP with TLS / SSL encryption) services.
For more details about embedded TLS / SSL functionalities see the u-blox AT Commands Manual [3].
1.15.10
AssistNow clients and GNSS integration
AssistNow clients and u-blox GNSS receiver integration are not available on the MPCI-L2 series modules.
AssistNow clients and u-blox GNSS receiver integration are not supported by the TOBY-L2 series modules
“00”, “01” and “50” product versions.
For customers using u-blox GNSS receivers, TOBY-L2 series cellular modules feature embedded AssistNow clients.
AssistNow A-GPS provides better GNSS performance and faster Time-To-First-Fix. The clients can be enabled and
disabled with an AT command (see the u-blox AT Commands Manual [3]).
TOBY-L2 series cellular modules act as a stand-alone AssistNow client, making AssistNow available with no
additional requirements for resources or software integration on an external host micro controller. Full access to
u-blox GNSS receivers is available via the TOBY-L2 series cellular module, through the DDC (I C) interface, while
the available GPIOs can handle the positioning chipset / module power-on/off. This means that cellular module
and GNSS receiver can be controlled through a single serial port from any host processor.
1.15.11
Hybrid positioning and CellLocate®
®
Hybrid positioning and CellLocate are not available on MPCI-L2 series.
®
Hybrid positioning and CellLocate are not supported by the TOBY-L2 series modules “00”, “01” and
“50” product versions.
Although GNSS is a widespread technology, its reliance on the visibility of extremely weak GNSS satellite signals
means that positioning is not always possible. Especially difficult environments for GNSS are indoors, in enclosed
or underground parking garages, as well as in urban canyons where GNSS signals are blocked or jammed by
multipath interference. The situation can be improved by augmenting GNSS receiver data with cellular network
information to provide positioning information even when GNSS reception is degraded or absent. This additional
information can benefit numerous applications.
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Positioning through cellular information: CellLocate
®
®
u-blox CellLocate enables the estimation of device position based on the parameters of the mobile network cells
®
visible to the specific device. To estimate its position the u-blox cellular module sends the CellLocate server the
parameters of network cells visible to it using a UDP connection. In return the server provides the estimated
®
position based on the CellLocate database. The u-blox cellular module can either send the parameters of the
visible home network cells only (normal scan) or the parameters of all surrounding cells of all mobile operators
(deep scan).
®
The CellLocate database is compiled from the position of devices which observed, in the past, a specific cell or
set of cells (historical observations) as follows:
®
1. Several devices reported their position to the CellLocate server when observing a specific cell (the As in the
picture represent the position of the devices which observed the same cell A)
®
2. CellLocate server defines the area of Cell A visibility
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®
3. If a new device reports the observation of Cell A CellLocate is able to provide the estimated position from
the area of visibility
4. The visibility of multiple cells provides increased accuracy based on the intersection of areas of visibility.
®
®
CellLocate is implemented using a set of two AT commands that allow configuration of the CellLocate service
(AT+ULOCCELL) and requesting position according to the user configuration (AT+ULOC). The answer is provided
in the form of an unsolicited AT command including latitude, longitude and estimated accuracy.
®
The accuracy of the position estimated by CellLocate depends on the availability of historical observations
in the specific area.
Hybrid positioning
With u-blox Hybrid positioning technology, u-blox cellular devices can be triggered to provide their current
®
position using either a u-blox GNSS receiver or the position estimated from CellLocate . The choice depends on
which positioning method provides the best and fastest solution according to the user configuration, exploiting
the benefit of having multiple and complementary positioning methods.
Hybrid positioning is implemented through a set of three AT commands that allow configuration of the GNSS
®
receiver (AT+ULOCGNSS), configuration of the CellLocate service (AT+ULOCCELL), and requesting the position
according to the user configuration (AT+ULOC). The answer is provided in the form of an unsolicited AT
command including latitude, longitude and estimated accuracy (if the position has been estimated by
®
CellLocate ), and additional parameters if the position has been computed by the GNSS receiver.
The configuration of mobile network cells does not remain static (e.g. new cells are continuously added or
existing cells are reconfigured by the network operators). For this reason, when a Hybrid positioning method has
been triggered and the GNSS receiver calculates the position, a database self-learning mechanism has been
implemented so that these positions are sent to the server to update the database and maintain its accuracy.
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The use of hybrid positioning requires a connection via the DDC (I C) bus between the TOBY-L2 series cellular
module and the u-blox GNSS receiver (see sections 1.9.3 and 2.6.3).
See GNSS Implementation Application Note [13] for the complete description of the feature.
®
u-blox is extremely mindful of user privacy. When a position is sent to the CellLocate server u-blox is
unable to track the SIM used or the specific device.
1.15.12
Wi-Fi integration
u-blox short range communication Wi-Fi modules integration is not available for MPCI-L2 series modules.
u-blox short range communication Wi-Fi modules integration is not supported by the TOBY-L2 series
modules “00” and “01” product versions.
Full access to u-blox short range communication Wi-Fi modules is available through a dedicated SDIO interface
(see sections 1.9.4 and 2.6.4). This means that combining a TOBY-L2 series cellular module with a u-blox short
range communication module gives designers full access to the Wi-Fi module directly via the cellular module, so
that a second interface connected to the Wi-Fi module is not necessary.
AT commands via the AT interfaces of the cellular module (UART, USB) allows a full control of the Wi-Fi module
from any host processor, because Wi-Fi control messages are relayed to the Wi-Fi module via the dedicated SDIO
interface (for more details, see the Wi-Fi AT commands in the u-blox AT Commands Manual [3]).
All the management software for Wi-Fi module operations runs inside the cellular module in addition to those
required for cellular-only operation: Wi-Fi driver, Web User Interface (WebUI), Connection Config Manager.
For more details, see the Wi-Fi / Cellular Integration Application Note [14].
1.15.13
Firmware update Over AT (FOAT)
This feature allows upgrading the module firmware over USB / UART serial interfaces, using AT commands.

The +UFWUPD AT command triggers a reboot followed by the upgrade procedure at specified a baud rate

A special boot loader on the module performs firmware installation, security verifications and module reboot

Firmware authenticity verification is performed via a security signature during the download. The firmware is
then installed, overwriting the current version. In case of power loss during this phase, the boot loader
detects a fault at the next wake-up, and restarts the firmware download. After completing the upgrade, the
module is reset again and wakes-up in normal boot
For more details about Firmware update Over AT procedure see the Firmware Update Application Note [4] and
the u-blox AT Commands Manual [3], +UFWUPD AT command.
1.15.14
Firmware update Over The Air (FOTA)
Firmware update Over The Air (FOTA) is not supported by “00” and “50” product versions.
This feature allows upgrading the module firmware over the LTE/3G/2G air interface.
In order to reduce the amount of data to be transmitted over the air, the implemented FOTA feature requires
downloading only a “delta file” instead of the full firmware. The delta file contains only the differences between
the two firmware versions (old and new), and is compressed. The firmware update procedure can be triggered
using dedicated AT command with the delta file stored in the module file system via over the air FTP.
For more details about Firmware update Over The Air procedure see the Firmware Update Application Note [4]
and the u-blox AT Commands Manual [3], +UFWINSTALL AT command.
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1.15.15
In-band Modem (eCall / ERA-GLONASS)
In-band modem for eCall / ERA-GLONASS emergency applications is not supported by TOBY-L2 series
modules “00”, “01”, and “50” product versions and by MPCI-L2 series modules.
In-band Modem solution for eCall and ERA-GLONASS emergency call applications over cellular networks is
implemented according to 3GPP TS 26.267 [16], BS EN 16062:2011 [17] and ETSI TS 122 101 [18] specifications.
eCall (European) and ERA-GLONASS (Russian) are initiatives to combine mobile communications and satellite
positioning to provide rapid assistance to motorists in the event of a collision, implementing automated
emergency response system based the first on GPS the latter on GLONASS positioning system.
When activated, the in-vehicle systems (IVS) automatically initiate an emergency call carrying both voice and data
(including location data) directly to the nearest Public Safety Answering Point (PSAP) to determine whether
rescue services should be dispatched to the known position.
Figure 26: eCall and ERA-GLONASS automated emergency response systems diagram flow
For more details regarding the In-band Modem solution for the European eCall and the Russian ERA-GLONASS
emergency call applications, see the u-blox eCall / ERA-GLONASS Application Note [19].
1.15.16
SIM Access Profile (SAP)
SIM Access Profile (SAP) is not supported by TOBY-L2 “00”, “01”, and “50” product versions or by MPCIL2 series modules.
SIM access profile (SAP) feature allows accessing and using a remote SIM card / chipping instead of the local SIM
directly connected to the module SIM interface.
A dedicated SAP channel over USB and a dedicated multiplexed SAP channel over UART are implemented for
communication with the remote SIM card/chip.
Communication between TOBY-L2 series module and the remote SIM is conformed to client-server paradigm:
The module is the SAP client establishing a connection and performing data exchange to a SAP server directly
connected to the remote SIM that is used by the module for LTE/3G/2G network-related operations. The SAP
communication protocol is based on the SIM Access Profile Interoperability Specification [20].
A typical application using the SAP feature is the scenario where a device such as an embedded car-phone with
an integrated TOBY-L2 series module uses a remote SIM included in an external user device (e.g. a simple SIM
card reader or a portable phone), which is brought into the car. The car-phone accesses the LTE/3G/2G network
using the remote SIM in the external device.
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TOBY-L2 series modules, acting as an SAP client, can be connected to an SAP server by a completely wired
connection, as shown in Figure 27.
Device including SIM
Mobile
Equipment
SAP Server
Device including TOBY-L2
SAP
Serial Interface
Application
Processor
SAP
Serial Interface
TOBY-L2
SAP Client
LTE/3G/2G
Interface
(SAP channel over
USB or UART)
Local SIM
Remote SIM
(optional)
Figure 27: Remote SIM access via completely wired connection
As stated in the SIM Access Profile Interoperability Specification [20], the SAP client can be connected to the SAP
server by means of a Bluetooth wireless link, using additional Bluetooth transceivers. In this case, the application
processor wired to TOBY-L2 series module establishes and controls the Bluetooth connection using the SAP
profile, and routes data received over a serial interface channel to data transferred over a Bluetooth interface
and vice versa, as shown in Figure 28.
Device including SIM
Mobile
Equipment
SAP Server
Bluetooth
Transceiver
Device including TOBY-L2
SAP
Bluetooth
Interface
Bluetooth
Transceiver
SAP
Application Serial Interface
Processor
(SAP channel over
USB or UART)
TOBY-L2
SAP Client
LTE/3G/2G
Interface
Local SIM
Remote SIM
(optional)
Figure 28: Remote SIM access via Bluetooth and wired connection
The application processor can start an SAP connection negotiation between TOBY-L2 series module SAP client
and an SAP server using custom AT command (for more details see u-blox AT Commands Manual [3]).
While the connection with the SAP server is not fully established, the TOBY-L2 series module continues to
operate with the attached (local) SIM, if present. Once the connection is established and negotiated, the module
performs a detach operation from the local SIM followed by an attach operation to the remote one. Then the
remotely attached SIM is used for any LTE/3G/2G network operation.
URC indications are provided to inform the user about the state of both the local and remote SIM. The insertion
and the removal of the local SIM card are notified if a proper card presence detection circuit using the GPIO5 of
TOBY-L2 series modules is implemented as shown in section 2.5, and if the related “SIM card detection” and
“SIM hot insertion/removal” functions described in section 1.8.2 are enabled by AT commands (for more details
see u-blox AT Commands Manual [3]).
Upon SAP deactivation, the TOBY-L2 series modules perform a detach operation from the remote SIM followed
by an attach operation to the local one, if present.
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1.15.17
Smart temperature management
Smart temperature management is not supported by “00”, “01”, and “50” product versions.
Cellular modules – independent of the specific model – always have a well defined operating temperature range.
This range should be respected to guarantee full device functionality and long life span.
Nevertheless there are environmental conditions that can affect operating temperature, e.g. if the device is
located near a heating/cooling source, if there is/isn’t air circulating, etc.
The module itself can also influence the environmental conditions; such as when it is transmitting at full power.
In this case its temperature increases very quickly and can raise the temperature nearby.
The best solution is always to properly design the system where the module is integrated. Nevertheless an extra
check/security mechanism embedded into the module is a good solution to prevent operation of the device
outside of the specified range.
Smart Temperature Supervisor (STS)
The Smart Temperature Supervisor is activated and configured by a dedicated AT+USTS command. See the
u-blox AT Commands Manual [3] for more details.
The cellular module measures the internal temperature (Ti) and its value is compared with predefined thresholds
to identify the actual working temperature range.
Temperature measurement is done inside the cellular module: the measured value could be different from
the environmental temperature (Ta).
Valid temperature range
Dangerous
area
Warning
area
t-2
Safe
area
t-1
Warning
area
t+1
Dangerous
area
t+2
Figure 29: Temperature range and limits
The entire temperature range is divided into sub-regions by limits (see Figure 29) named t-2, t-1, t+1 and t+2.

Within the first limit, (t-1 < Ti < t+1), the cellular module is in the normal working range, the Safe Area

In the Warning Area, (t-2 < Ti < t.1) or (t+1 < Ti < t+2), the cellular module is still inside the valid temperature
range, but the measured temperature approaches the limit (upper or lower). The module sends a warning to
the user (through the active AT communication interface), which can take, if possible, the necessary actions
to return to a safer temperature range or simply ignore the indication. The module is still in a valid and good
working condition

Outside the valid temperature range, (Ti < t -2) or (Ti > t+2), the device is working outside the specified range
and represents a dangerous working condition. This condition is indicated and the device shuts down to
avoid damage
For security reasons the shutdown is suspended in case an emergency call in progress. In this case the
device will switch off at call termination.
The user can decide at anytime to enable/disable the Smart Temperature Supervisor feature. If the feature
is disabled there is no embedded protection against disallowed temperature conditions.
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Figure 30 shows the flow diagram implemented for the Smart Temperature Supervisor.
No
IF STS
enabled
Feature disabled:
no action
Yes
Feature enabled
(full logic or
indication only)
Read
temperature
Yes
Temperature is
within normal
operating range
No
No
further
actions
IF
(t-1 5V?
No, less than 5 V
Yes, greater than 5 V
Linear LDO
Regulator
Switching Step-Down
Regulator
Figure 31: VCC supply concept selection
The switching step-down regulator is the typical choice when the available primary supply source has a nominal
voltage much higher (e.g. greater than 5 V) than the operating supply voltage of TOBY-L2 and MPCI-L2 series.
The use of switching step-down provides the best power efficiency for the overall application and minimizes
current drawn from the main supply source. See 2.2.1.2, 2.2.1.6, 2.2.1.9, 2.2.1.10 for specific design-in.
The use of an LDO linear regulator becomes convenient for a primary supply with a relatively low voltage (e.g.
less or equal than 5 V). In this case the typical 90% efficiency of the switching regulator diminishes the benefit
of voltage step-down and no true advantage is gained in input current savings. On the opposite side, linear
regulators are not recommended for high voltage step-down as they dissipate a considerable amount of energy
in thermal power. See 2.2.1.3, 2.2.1.6, 2.2.1.9, 2.2.1.10 for specific design-in.
If TOBY-L2 modules are deployed in a mobile unit where no permanent primary supply source is available, then a
battery will be required to provide VCC. A standard 3-cell Li-Ion or Li-Pol battery pack directly connected to VCC
is the usual choice for battery-powered devices. During charging, batteries with Ni-MH chemistry typically reach
a maximum voltage that is above the maximum rating for VCC, and should therefore be avoided. See 2.2.1.4,
2.2.1.6, 2.2.1.9, 2.2.1.10 for specific design-in.
Keep in mind that the use of rechargeable batteries requires the implementation of a suitable charger circuit
which is not included in the modules. The charger circuit has to be designed to prevent over-voltage on VCC
pins of the module, and it should be selected according to the application requirements: a DC/DC switching
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charger is the typical choice when the charging source has an high nominal voltage (e.g. ~12 V), whereas a
linear charger is the typical choice when the charging source has a relatively low nominal voltage (~5 V). If both
a permanent primary supply / charging source (e.g. ~12 V) and a rechargeable back-up battery (e.g. 3.7 V Li-Pol)
are available at the same time in the application as possible supply source, then a proper charger / regulator with
integrated power path management function can be selected to supply the module while simultaneously and
independently charging the battery. See 2.2.1.7, 2.2.1.8 and 2.2.1.6, 2.2.1.9, 2.2.1.10 for specific design-in.
The use of a primary (not rechargeable) battery is in general uncommon, but appropriate parts can be selected
given that the most cells available are seldom capable of delivering the maximum current specified in TOBY-L2
series Data Sheet [1] during connected-mode. Carefully evaluate the usage of super-capacitors as supply source
since aging and temperature conditions significantly affect the actual capacitor characteristics. See 2.2.1.5 and
2.2.1.6, 2.2.1.9, 2.2.1.10 for specific design-in.
Rechargeable 3-cell Li-Ion or Li-Pol and Ni-MH chemistry batteries reach a maximum voltage that is above the
maximum rating for the 3.3Vaux supply of MPCI-L2 modules, and should therefore be avoided. The use of
rechargeable, not-rechargeable battery or super-capacitors is very uncommon for Mini PCI Express applications,
so that these supply sources types are not considered for MPCI-L2 modules.
The usage of more than one DC supply at the same time should be carefully evaluated: depending on the supply
source characteristics, different DC supply systems can result as mutually exclusive.
The following sections highlight some design aspects for each of the supplies listed above providing application
circuit design-in compliant with the module VCC requirements summarized in Table 7.
2.2.1.2 Guidelines for VCC or 3.3Vaux supply circuit design using a switching regulator
The use of a switching regulator is suggested when the difference from the available supply rail to the VCC or
the 3.3Vaux value is high, since switching regulators provide good efficiency transforming a 12 V or greater
voltage supply to the typical 3.8 V value of the VCC supply or the typical 3.3 V value of the 3.3Vaux supply.
The characteristics of the switching regulator connected to VCC or 3.3Vaux pins should meet the following
prerequisites to comply with the module VCC or 3.3Vaux requirements summarized in Table 7:

Power capability: the switching regulator with its output circuit must be capable of providing a voltage
value to the VCC or 3.3Vaux pins within the specified operating range and must be capable of delivering to
VCC or 3.3Vaux pins the maximum peak / pulse current consumption during Tx burst at maximum Tx
power specified in the TOBY-L2 series Data Sheet [1] or in the MPCI-L2 series Data Sheet [2].

Low output ripple: the switching regulator together with its output circuit must be capable of providing a
clean (low noise) VCC or 3.3Vaux voltage profile.

High switching frequency: for best performance and for smaller applications it is recommended to select a
switching frequency ≥ 600 kHz (since L-C output filter is typically smaller for high switching frequency). The
use of a switching regulator with a variable switching frequency or with a switching frequency lower than
600 kHz must be carefully evaluated since this can produce noise in the VCC or 3.3Vaux voltage profile and
therefore negatively impact LTE/3G/2G modulation spectrum performance. An additional L-C low-pass filter
between the switching regulator output to VCC or 3.3Vaux supply pins can mitigate the ripple at the input
of the module, but adds extra voltage drop due to resistive losses on series inductors.

PWM mode operation: it is preferable to select regulators with Pulse Width Modulation (PWM) mode.
While in connected-mode, the Pulse Frequency Modulation (PFM) mode and PFM/PWM modes transitions
must be avoided to reduce the noise on the VCC or 3.3Vaux voltage profile. Switching regulators can be
used that are able to switch between low ripple PWM mode and high ripple PFM mode, provided that the
mode transition occurs when the module changes status from the idle/active-modes to connected-mode. It
is permissible to use a regulator that switches from the PWM mode to the burst or PFM mode at an
appropriate current threshold.
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Figure 32 and Table 14 show an example of a high reliability power supply circuit, where the module VCC or
3.3Vaux input is supplied by a step-down switching regulator capable of delivering maximum current with low
output ripple and with fixed switching frequency in PWM mode operation greater than 1 MHz.
12V
TOBY-L2 series
VIN
5 RUN
R1
BOOST 2
9 VC
10 RT
R2
C1
C2
7 PG
R3
C3 C4
70 VCC
71 VCC
BD
72 VCC
C6
L1
SW
D1
U1
R4
C8
FB 8
SYNC
GND
11
C5
C7
GND
R5
12V
MPCI-L2 series
VIN
BOOST 2
9 VC
10 RT
R2
C1
C2
7 PG
R3
C3 C4
C5
BD 1
5 RUN
R1
C6
L1
SW
D1
U1
3.3Vaux
24 3.3Vaux
39 3.3Vaux
R6
C7
C8
41 3.3Vaux
52 3.3Vaux
FB 8
SYNC
GND
11
R5
GND
Figure 32: Example of high reliability VCC and 3.3Vaux supply application circuit using a step-down regulator
Reference
Description
Part Number - Manufacturer
C1
10 µF Capacitor Ceramic X7R 5750 15% 50 V
C5750X7R1H106MB - TDK
C2
10 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R71C103KA01 - Murata
C3
C4
680 pF Capacitor Ceramic X7R 0402 10% 16 V
22 pF Capacitor Ceramic C0G 0402 5% 25 V
GRM155R71H681KA01 - Murata
GRM1555C1H220JZ01 - Murata
C5
C6
10 nF Capacitor Ceramic X7R 0402 10% 16 V
470 nF Capacitor Ceramic X7R 0603 10% 25 V
GRM155R71C103KA01 - Murata
GRM188R71E474KA12 - Murata
C7
22 µF Capacitor Ceramic X5R 1210 10% 25 V
GRM32ER61E226KE15 - Murata
C8
330 µF Capacitor Tantalum D_SIZE 6.3 V 45 m
T520D337M006ATE045 - KEMET
D1
L1
Schottky Diode 40 V 3 A
10 µH Inductor 744066100 30% 3.6 A
MBRA340T3G - ON Semiconductor
744066100 - Wurth Electronics
R1
470 k Resistor 0402 5% 0.1 W
2322-705-87474-L - Yageo
R2
15 k Resistor 0402 5% 0.1 W
2322-705-87153-L - Yageo
R3
22 k Resistor 0402 5% 0.1 W
2322-705-87223-L - Yageo
R4
390 k Resistor 0402 1% 0.063 W
RC0402FR-07390KL - Yageo
R5
100 k Resistor 0402 5% 0.1 W
2322-705-70104-L - Yageo
R6
330 k Resistor 0402 1% 0.063 W
Step-Down Regulator MSOP10 3.5 A 2.4 MHz
RC0402FR-07330KL - Yageo
U1
LT3972IMSE#PBF - Linear Technology
Table 14: Components for high reliability VCC and 3.3Vaux supply application circuit using a step-down regulator
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Figure 33 and the components listed in Table 15 show an example of a low cost power supply circuit, where the
VCC module supply is provided by a step-down switching regulator capable of delivering to VCC pins the
specified maximum peak / pulse current, transforming a 12 V supply input.
12V
TOBY-L2 series
VCC
OUT 1
3 INH
L1
D1
C1
6 FSW
C6
R5
U1
2 SYNC
70 VCC
71 VCC
R1
72 VCC
R3
C3
FB 5
C4
R4
COMP 4
C2
R2
GND
GND
C5
12V
MPCI-L2 series
VCC
OUT 1
3 INH
L1
D1
C1
6 FSW
C6
R5
U1
2 SYNC
R6
R3
41 3.3Vaux
52 3.3Vaux
C3
FB 5
C4
R4
COMP 4
3.3Vaux
24 3.3Vaux
39 3.3Vaux
C2
R7
GND
GND
C5
Figure 33: Example of low cost VCC and 3.3Vaux supply application circuit using step-down regulator
Reference
Description
Part Number - Manufacturer
C1
22 µF Capacitor Ceramic X5R 1210 10% 25 V
GRM32ER61E226KE15 – Murata
C2
T520B107M006ATE015 – Kemet
C3
100 µF Capacitor Tantalum B_SIZE 20% 6.3V 15m
5.6 nF Capacitor Ceramic X7R 0402 10% 50 V
C4
C5
6.8 nF Capacitor Ceramic X7R 0402 10% 50 V
56 pF Capacitor Ceramic C0G 0402 5% 50 V
GRM155R71H682KA88 – Murata
GRM1555C1H560JA01 – Murata
C6
D1
220 nF Capacitor Ceramic X7R 0603 10% 25 V
Schottky Diode 25V 2 A
GRM188R71E224KA88 – Murata
STPS2L25 – STMicroelectronics
L1
5.2 µH Inductor 30% 5.28A 22 m
MSS1038-522NL – Coilcraft
R1
4.7 k Resistor 0402 1% 0.063 W
RC0402FR-074K7L – Yageo
R2
910  Resistor 0402 1% 0.063 W
RC0402FR-07910RL – Yageo
R3
82  Resistor 0402 5% 0.063 W
RC0402JR-0782RL – Yageo
R4
8.2 k Resistor 0402 5% 0.063 W
RC0402JR-078K2L – Yageo
R5
39 k Resistor 0402 5% 0.063 W
RC0402JR-0739KL – Yageo
R6
1.5 k Resistor 0402 1% 0.063 W
RC0402FR-071K5L – Yageo
R7
330  Resistor 0402 1% 0.063 W
Step-Down Regulator 8-VFQFPN 3 A 1 MHz
RC0402FR-07330RL – Yageo
U1
GRM155R71H562KA88 – Murata
L5987TR – ST Microelectronics
Table 15: Components for low cost VCC and 3.3Vaux supply application circuit using a step-down regulator
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2.2.1.3 Guidelines for VCC or 3.3Vaux supply circuit design using a Low Drop-Out linear regulator
The use of a linear regulator is suggested when the difference from the available supply rail and the VCC or the
3.3Vaux value is low. The linear regulators provide high efficiency when transforming a 5 VDC supply to a
voltage value within the module VCC or 3.3Vaux normal operating range.
The characteristics of the Low Drop-Out (LDO) linear regulator connected to VCC or 3.3Vaux pins should meet
the following prerequisites to comply with the module VCC or 3.3Vaux requirements summarized in Table 7:

Power capabilities: the LDO linear regulator with its output circuit must be capable of providing a voltage
value to the VCC or 3.3Vaux pins within the specified operating range and must be capable of delivering to
VCC or 3.3Vaux pins the maximum peak / pulse current consumption during Tx burst at maximum Tx
power specified in TOBY-L2 series Data Sheet [1] or in MPCI-L2 series Data Sheet [2].

Power dissipation: the power handling capability of the LDO linear regulator must be checked to limit its
junction temperature to the maximum rated operating range (i.e. check the voltage drop from the max input
voltage to the minimum output voltage to evaluate the power dissipation of the regulator).
Figure 34 and the components listed in Table 16 show an example of a power supply circuit, where the VCC or
3.3Vaux module supply is provided by an LDO linear regulator capable of delivering the