Barrot Technology IVTI40E Bluetooth Module User Manual
IVT Corporation Bluetooth Module
user manual
oSy lei Blu Blu oSy lei Blu i40e Datasheet February 20, 2014 Version 1.4 oSy lei lu oSy i40e Datasheet VERSION HISTORY REVISION AMENDMENT 1.0 Initial version 1.1 Sy DATE AUTHOR il 2012-06-25 Added certification, contact Zhu Yong 2012-08-06 information, copyright 1.2 1.3 Wang Yuqiang Zhu Yong Huang Ruixue Format update 2012-11-28 Li Li Update package information. 2012-12-12 Li Li 2014-2-20 Li Li Refer to the chapter 11. 1.4 Add FCC & IC number Blu oSy lei Blu oSy lei lu oSy 2 / 37 i40e Datasheet Contents oSy Block Diagram and Descriptions....................................................................................................... 6 Electrical Characteristics .................................................................................................................. 8 lei 2.1 Absolute Maximum Ratings ................................................................................................. 8 2.2 Recommended Operating Conditions ................................................................................. 8 2.3 Terminal Characteristics ...................................................................................................... 8 2.4 Current Consumption .......................................................................................................... 9 2.5 Radio Characteristics ......................................................................................................... 10 Blu 2.5.1 Transmitter Radio Characteristics .............................................................................. 10 2.5.2 Receiver Radio Characteristics................................................................................... 10 oSy Pin Description ............................................................................................................................... 11 Physical Interfaces .......................................................................................................................... 15 4.1 4.1.1 Blu SPI Interface ....................................................................................................................... 16 4.3 PCM Interface .................................................................................................................... 17 4.3.2 PCM Interface Master/Slave ...................................................................................... 17 Long Frame Sync........................................................................................................ 18 4.3.3 Short Frame Sync....................................................................................................... 19 4.3.4 Multi Slot Operation .................................................................................................. 19 4.3.5 GCI Interface .............................................................................................................. 20 4.3.6 Slots and Sample Formats ......................................................................................... 20 4.3.7 Additional Features ................................................................................................... 21 4.3.8 Blu oSy lei PCM Configuration .................................................................................................... 21 Software Stacks .............................................................................................................................. 23 5.1 UART Configuration While RESET is Active ................................................................ 16 4.2 4.3.1 lei UART Interface................................................................................................................... 15 BlueSoleil Stack .................................................................................................................. 23 Enhanced Data Rate ....................................................................................................................... 24 6.1 Enhanced Data Rate Baseband .......................................................................................... 24 6.2 Enhanced Data Rate _/4 DQPSK ........................................................................................ 24 6.3 8DQPSK .............................................................................................................................. 25 oSy Re-flow Temperature-time profile.................................................................................................. 26 Reliability and Environmental Specification ................................................................................... 27 lu 8.1 Temperature test ...................................................................................................................... 27 8.2 Vibration Test............................................................................................................................ 27 8.3 Desquamation test.................................................................................................................... 27 8.4 Drop test ................................................................................................................................... 27 8.5 Packaging information .............................................................................................................. 28 Layout and Soldering Considerations ............................................................................................. 28 9.1 Soldering Recommendations ............................................................................................. 28 3 / 37 i40e Datasheet 9.2 Layout Guidelines .............................................................................................................. 28 10 Physical Dimensions ....................................................................................................................... 29 11 Package .......................................................................................................................................... 30 12 Certification .................................................................................................................................... 32 oSy 12.1 Bluetooth ........................................................................................................................... 32 12.2 Korea KCC .......................................................................................................................... 33 12.3 Japan TELEC ....................................................................................................................... 34 12.4 Bluetooth Technology Best Developed Corporation ......................................................... 35 lei Blu 13 Contacts ......................................................................................................................................... 36 14 Copyright ........................................................................................................................................ 37 Blu oSy lei Blu oSy lei lu oSy 4 / 37 i40e Datasheet i40e oSy FEATURES DESCRIPTION BlueSoleil i40e is a Bluetooth 2.1 +EDR Fully Qualified Bluetooth system v2.1 + EDR, BQB, KCC, TELEC (Enhanced Data Rates) Class 2 module. i40e contains all the necessary elements from Integrated chip antenna Industrial temperature range from -400C to Bluetooth radio to antenna, and a fully implemented protocol stack. Support both Master and Slave roles +850C By default, i40e module is equipped with RoHS Compliant powerful and easy-to-use BlueSoleil firmware. Support for 802.11 Coexistence BlueSoleil firmware enables users to access 8Mbits of Flash Memory Bluetooth functionality with simple ASCII Low power consumption lei commands delivered to the module over serial APPLICATIONS interface - it's just like a Bluetooth modem. Blu oSy Cable replacement Therefore, i40e provides an ideal solution for Point-of-sales systems developers who rapidly want to integrate Barcode readers and pay terminals Bluetooth wireless technology into their design. Telemetry and machine-to-machine devices oSy Automotive inspection and measurement systems Medical systems Fitness and sports telemetry devices lu oSy Figure 1 BlueSoleil i40e 5 / 37 I40e Datasheet 1 Block Diagram and Descriptions oSy BlueSoleil i40e’s block diagram is illustrated in Figure 2 below. ei PCB antenna BALUN FILTER oSy 26M crystal USB Blu lei UART Bluecore04 EXTFLASH SPI PCM PIO oSy 8M bit FLASH lei Figure 2 i40e Block Diagram BlueCore04 Blu BlueCore4 is a single chip Bluetooth solution which implements the Bluetooth radio transceiver and also an on chip microcontroller. BlueCore4 implements Bluetooth® 2.1 + EDR (Enhanced Data Rate) and it can deliver data rates up to 3 Mbps. oSy The microcontroller (MCU) on BlueCore04 acts as interrupt controller and event timer run lu the BlueSoleil stack and control the radio and host interfaces. A 16-bit reduced instruction set computer (RISC) microcontroller is used for low power consumption and efficient use of memory. BlueCore04 has 48Kbytes of on-chip RAM is provided to support the RISC MCU and is shared between the ring buffers used to hold voice/data for each active connection and the general purpose memory required by the BlueSoleil stack. Crystal The crystal oscillates at 26MHz. 6 / 37 i40e Datasheet Flash Flash memory is used for storing the Bluetooth protocol stack and Virtual Machine applications. It can also be used as an optional external RAM for memory intensive applications. oSy Balun / filter lei Combined balun and filter changes the balanced input/output signal of the module to unbalanced signal of the monopole antenna. The filter is a band pass filter (ISM band). Blu Matching Antenna matching components match the antenna to 50 Ohms. Antenna oSy The antenna is meander PCB antenna. USB lei This is a full speed Universal Serial Bus (USB) interface for communicating with other Blu compatible digital devices. i40e acts as a USB peripheral, responding to requests from a Master host controller such as a PC. Synchronous Serial Interface This is a synchronous serial port interface (SPI) for interfacing with other digital devices. The SPI port can be used for system debugging. It can also be used for programming the Flash oSy memory. UART lei This is a standard Universal Asynchronous Receiver Transmitter (UART) interface for Blu communicating with other serial devices. Audio PCM Interface The audio pulse code modulation (PCM) Interface supports continuous transmission and reception of PCM encoded audio data over Bluetooth. Programmable I/O oSy i40e has a total of 9 digital programmable I/O terminals. These are controlled by firmware lu running on the device. RESETB This can be used to reset i40e. i40e is equipped with circuitry for generating Power ON Reset from the internal core voltage. A reset is generated when the core voltage falls below typically 1.5V and is released when it rises above typically 1.6V.Via Pin RESETB an external reset is generated by holding RESETB at ≤ 0.3V for ≥ 5ms. 7 / 37 i40e Datasheet 802.11 Coexistence Interface Dedicated hardware is provided to implement a variety of coexistence schemes. Channel skipping AFH (Adaptive Frequency Hopping), priority signaling, channel signaling and host passing oSy of channel instructions are all supported. All mentioned features are configured in firmware. 2 Electrical Characteristics Blu 2.1 Absolute Maximum Ratings oSy The module should not continuously run under extreme conditions. The absolute maximum ratings are summarized in Table 1 below. Exposure to absolute maximum rating conditions for lei extended periods of time may affect reliability and cause permanent damage to the device. Blu Table 1 Absolute Maximum Ratings Min Max Unit Storage temperature -40 85 °C Operating temperature -40 85 °C Supply voltage -0.3 3.6 2.2 Recommended Operating Conditions Sy Blu Terminal voltages Vss-0.4 Vdd+0.4 Recommended operating conditions are summarized in Table 2 below. BlueSoleil i40e operates as low as 2.7 V supply voltage. However, to safely meet the USB specification for minimum voltage for USB data lines, minimum of 3.1 V supply is required. Table 2 Recommended Operating Conditions Min Operating temperature -40 Supply voltage 3.1 2.3 Terminal Characteristics Blu Terminal voltages Ec Typ Max Unit 20 85 °C 3.3 3.6 Vdd BlueSoleil i40e’s terminal characteristics are summarized in Table 3 below. Table 3 Terminal Characteristics 8 / 37 i40e Datasheet Min Typ Max Unit VIL input logic level low -0.4 0.8 VIH input logic level high 0.7Vdd Vdd + 0.4 VOL output logic level low 0,2 Vdd -0.2 0.64 0.85 1.5 220 kΩ 220 nF -100 -40 -10 µA Strong pull-down 10 40 100 µA Weak pull-up -5 -1 -0.2 µA Weak pull-down 0.2 µA I/O pad leakage current -1 µA 70 mA 70 mA I/O voltage levels oSy lei VOH output logic level high Reset terminal Blu VTH,res threshold voltage RIRES input resistance CIRES input capacitance Input and tri-state current with Strong pull-up Blu Vdd supply current TX mode RX mode oSy lei 2.4 Current Consumption oSy BlueSoleil i40e’s current consumption is summarized in Table 4 below. Table 4 Current Consumption lu Operation Mode Connection Type Inquiry and Page scan ACL No traffic 500ms Slave Sniff ACL with file transfer Stand by Host connection(a) lei UART Rate (kbps) Average Unit 2.1 mA 9.6 1.9 mA Master 9.6 1.9 mA Slave 9.6 Master 9.6 Blu eSo Ec 22.7 mA 11.5 mA 1.0 mA 9 / 37 i40e Datasheet 2.5 Radio Characteristics oSy 2.5.1 Transmitter Radio Characteristics lei i40e meets the Bluetooth v2.1 + EDR specification between -40°C and +85°C. TX output is guaranteed to be unconditionally stable over the guaranteed temperature range. Refer to Table 5 Blu below. Measurement conditions: T = 20℃, Vdd = 3,3V Table 5 Transmitter Radio Characteristics at Basic Data Rate and Temperature 20℃ Item Maximum output power1,2 F = F0 ± 3MHz dBm ≧16 dB ≦1000 kHz ≦ 20 dBm -45 -40 dBm -50 -40 dBm eil lue Adjacent channel transmit power Sy Adjacent channel transmit power F = F0 ± > 3MHz Unit -6 to 43 35 20dB bandwidth for modulated carrier F = F0 ± 2MHz Specification +2.5 RF power control range Adjacent channel transmit power Bluetooth Typical Value 780 -40 Δf1avg Maximum Modulation 165 1405ms to cause a reset oSy ei Ground Bi-directional with programmable Control output for external LNA(if fitted) oSy strength Bi-directional with 24 PIO(1) lei programmable strength 25 PIO(2) 26 PIO(3) 27 lu PIO(4) Bi-directional Programmable Input/Output Line Bi-directional Programmable Input/Output Line Bi-directional with programmable strength Bi-directional with 28 PIO(5) programmable strength 29 NC 30 NC 31 NC 32 PIO(9) 33 PIO(10) 34 PIO(11) Control output for external PA(if fitted) Programmable Input/Output Line or optional BT_Priority/CH_Clk output for co-existence BT_Active output for co-existence lu NC NC oSy Programmable Input/Output Line or optional NC Bi-directional Programmable Input/Output Line Bi-directional Programmable Input/Output Line Bi-directional Programmable Input/Output Line 12 / 37 i40e Datasheet GND Connect GND pins to the ground plane of PCB. oSy VDD 3.3 V supply voltage connection. i40e has an internal decoupling capacitor and LC filter to block lei high frequency disturbances. Thus external filtering is usually not needed. It is however recommended to leave an option for an external high Q 10pF decoupling capacitor in case EMC problems arise. RESETB Blu The RESET pin is an active high reset and is internally filtered using the internal low frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESET being active. It is recommended that RESET be applied for a period greater than 5ms. oSy BlueSoleil i40e has an internal reset circuitry, which keeps reset pin active until supply voltage has reached stability in the start up. See Figure 4below. This ensures that supply for the flash memory lei inside the i40e will reach stability before BC4 chip fetches instructions from it. Schematic of the reset circuitry is shown in figure 4. Rising supply voltage charges the capacitor, which will activate the reset Blu of i40e. The capacitor discharges through 220k resistor, which eventually deactivates the reset. Time constant of the RC circuitry is set such that the supply voltage is safely stabilized before reset deactivates. Pull-up or pull-down resistor should not be connected to the reset pin to ensure proper star up of i40e. Blu oSy lei oSy Figure 4 i40e Internal Reset Circuitry lu PIO0 – PIO5, PIO9 –PIO11 Programmable digital I/O lines. NC Leave unconnected. 13 / 37 i40e Datasheet RTS CMOS output with weak internal pull-up. Can be used to implement RS232 hardware flow control where RTS (request to send) is active low indicator. UART interface requires external RS232 oSy transceiver chip. lei CTS CMOS input with weak internal pull-down. Can be used to implement RS232 hardware flow Blu control where CTS (clear to send) is active low indicator. UART interface requires external RS232 transceiver chip. RXD CMOS input with weak internal pull-down. RXD is used to implement UART data transfer from oSy another device to i40e. TXD lei CMOS output with weak internal pull-up. TXD is used to implement UART data transfer from i40e Blu to another device. PCM_OUT CMOS output with weak internal pull-down. Used in PCM (pulse code modulation) interface to transmit digitized audio. oSy PCM_IN CMOS input with weak internal pull-down. Used in PCM interface to receive digitized audio. PCM_CLK Blu lei Bi-directional synchronous data clock signal pin with weak internal pull-down. PCM_CLK is used in PCM interface to transmit or receive CLK signal. When configured as a master, i40e generates clock signal for the PCM interface. When configured as a slave PCM_CLK is an input and receives the clock signal from another device. PCM_SYNC oSy Bi-directional synchronous data strobe with weak internal pull-down. When configured as a master, i40e generates SYNC signal for the PCM interface. When configured as a slave PCM_SYNC is an lu input and receives the SYNC signal from another device. USB_D+ Bi-directional USB data line with a selectable internal 1.5 -up implemented as a current source (compliant with USB specification v1.2) External series resistor is required to match the connection to the characteristic impedance of the USB cable. USB_D- 14 / 37 i40e Datasheet Bi-directional USB data line. External series resistor is required to match the connection to the characteristic impedance of the USB cable. SPI_CSB oSy CMOS input with weak internal pull-up. Active low chip select for SPI (serial peripheral interface). lei SPI_CLK Blu CMOS input for the SPI clock signal with weak internal pull-down. i40e is the slave and receives the clock signal from the device operating as a master. SPI_MISO SPI data output with weak internal pull-down. oSy SPI_MOSI SPI data input with weak internal pull-down. 4 Physical Interfaces 4.1 UART Interface oSy BlueSoleil i40e Universal Asynchronous Receiver Transmitter (UART) interface provides a simple mechanism for communicating with other serial devices using the RS232 standard. i40e’s UART lei interface uses voltage levels of 0 to Vdd and thus external transceiver IC is required to meet the voltage level specifications of UART. Blu lu oSy Figure 5 i40e UART Interface Four signals are used to implement the UART function, as shown in Figure 5 above. When i40e is connected to another digital device, UART_RX and UART_TX transfer data between the two devices. The remaining two signals, UART_CTS and UART_RTS, can be used to implement RS232 hardware flow control where both are active low indicators. All UART connections are implemented using CMOS technology and have signaling levels of 0V and VDD. 15 / 37 i40e Datasheet In order to communicate with the UART at its maximum data rate using a standard PC, an accelerated serial port adapter card is required for the PC. The possible UART settings are summarized in Table 8 below. oSy Table 8 Possible UART Settings UART Parameters Baud rate Minimum Flow control Parity lei 1200 baud (≤2%Error) 9600 baud (≤1%Error) Blu Maximum Possible Values 3.0Mbaud (≤1%Error) RTS/CTS, none None, Odd, Even Number of stop bits 1 or 2 Bits per channel oSy lei The UART interface is capable of resetting i40e upon reception of a break signal. A Break is identified by a continuous logic low (0V) on the UART_RX terminal, as shown in Figure 5. If tBRK is Blu longer than the value, defined by the PS Key PSKEY_HOST_IO_UART_RESET_TIMEOUT(0x1a4), a reset will occur. This feature allows a host to initialize the system to a known state. Also, i40e can emit a Break character that may be used to wake the Host. See Figure 6 below. oSy Figure 6 Break Signal lei Since UART_RX terminal includes weak internal pull-down, it can’t be left open unless disabling Blu UART interface using PS_KEY settings. If UART is not disabled, a pull-up resistor has to be connected to UART_RX. UART interface requires external RS232 transceiver, which usually includes the required pull-up. 4.1.1 UART Configuration While RESET is Active oSy The UART interface for i40e while the chip is being held in reset is tri-state. This will allow the user to daisy chain devices onto the physical UART bus. The constraint on this method is that any 4.2 SPI InterfaceueS Bl devices connected to this bus must tri-state when i40e reset is de-asserted and the firmware begins to run. The synchronous serial port interface (SPI) is for interfacing with other digital devices. The SPI port can be used for system debugging. It can also be used for programming the Flash memory. SPI 16 / 37 i40e Datasheet interface is connected using the MOSI, MISO, CSB and CLK pins. The module operates as a slave and thus MISO is an output of the module. MISO is not in high impedance state when CSB is pulled high. Instead, the module outputs 0 if the processor is running oSy and 1 if it is stopped. lei 4.3 PCM Interface Blu PCM is a standard method used to digitize audio (particularly voice) for transmission over digital communication channels. Through its PCM interface, i40e has hardware support for continual transmission and reception of PCM data, thus reducing processor overhead for wireless headset applications. i40e offers a bidirectional digital audio interface that routes directly into the baseband layer of the on-chip firmware. It does not pass through the HCI protocol layer. oSy Hardware on i40e allows the data to be sent to and received from a SCO connection. Up to three lei SCO connections can be supported by the PCM interface at any one time. i40e can operate as the PCM interface master generating an output clock of 128, 256 or Blu 512kHz.When configured as PCM interface slave, it can operate with an input clock up to 2048KHz. i40e is compatible with a variety of clock formats, including Long Frame Sync, Short Frame Sync and GCI timing environments. It supports 13-bit or 16-bit linear, 8-bit µ-law or A-law companded sample formats at 8ksamples/s and can receive and transmit on any selection of three of the first four slots following oSy PCM_SYNC. The PCM configuration options are enabled by setting PSKEY_PCM_CONFIG32(0x1b3). lei 4.3.1 PCM Interface Master/Slave Blu When configured as the Master of the PCM interface, i40e generates PCM_CLK and PCM_SYNC. See Figure 7 below. lu oSy 17 / 37 i40e Datasheet oSy lei Blu oSy Figure 7 i40e as PCM Master lei When configured as the Slave of the PCM interface, i40e accepts PCM_CLK and PCM_SYNC. Blu PCM_CLK rates up to 2048kHz are accepted. See Figure 8 below. Blu oSy lei oSy Figure 8 i40e as PCM Slave lu 4.3.2 Long Frame Sync Long Frame Sync is the name given to a clocking format that controls the transfer of PCM data words or samples. In Long Frame Sync, the rising edge of PCM_SYNC indicates the start of the PCM word. When i40e is configured as PCM Master, generating PCM_SYNC and PCM_CLK, then PCM_SYNC is 8-bits long. When BlueCore4-External is configured as PCM Slave, PCM_SYNC may be from two consecutive falling edges of PCM_CLK to half the PCM_SYNC rate, i.e. 62.5µs long. See Figure 9 below. 18 / 37 i40e Datasheet i40e samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge. PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in the LSB position or on the rising edge. oSy lei Blu oSy Figure 9 Long frame Sync (shown with 8-bit companded sample) 4.3.3 Short Frame Sync Blu lei In Short Frame Sync the falling edge of PCM_SYNC indicates the start of the PCM word. PCM_SYNC is always one clock cycle long. See Figure 10 below. Blu oSy lei Figure 10 Short Frame Sync (shown with 16-bit companded sample) As with Long Frame Sync, I40e samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge. PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in the LSB position or on the rising edge. lu 4.3.4 Multi Slot Operation oSy More than one SCO connection over the PCM interface is supported using multiple slots. Up to three SCO connections can be carried over any of the first four slots. See Figure 11 below. 19 / 37 i40e Datasheet oSy lei Blu Figure 11 Multi Slot Operation (shown with two slots and 8-bit companded samples) oSy 4.3.5 GCI Interface lei i40e is compatible with the General Circuit Interface, a standard synchronous 2B+D ISDN timing interface. The two 64Kbps B channels can be accessed when this mode is configured. See Figure 12 below. Blu lu oSy lei Figure 12 GCI Interface The start of frame is indicated by the rising edge of PCM_SYNC and runs at 8K Hz. With i40e in Slave mode, the frequency of PCM_CLK can be up to 4.096MHz. 4.3.6 Slots and Sample Formats lu oSy i40e can receive and transmit on any selection of the first four slots following each sync pulse. Slot durations can be either 8 or 16 clock cycles. Duration’s of 8 clock cycles may only be used with 8-bit sample formats. Durations of 16 clocks may be used with 8, 13 or 16-bit sample formats. i40e supports 13-bit linear, 16-bit linear and 8-bit µ-law or A-law sample formats. The sample rate is 8ksamples/s. The bit order may be little or big endian. When 16-bit slots are used, the 3 or 8 unused bits in each slot may be filled with sign extension, padded with zeros or a programmable 3-bit audio attenuation compatible with some Motorola CODECs. See Figure 13 20 / 37 i40e Datasheet below. oSy lei Blu Blu oSy lei Figure 13 16-bit Slot with 13-bit Linear Sample and Audio Gain Selected 4.3.7 Additional Features i40e has a mute facility that forces PCM_OUT to be 0. In Master mode, PCM_SYNC may also be oSy forced to 0 while keeping PCM_CLK running which some CODECS use to control power down. 4.3.8 PCM Configuration Blu lei The PCM configuration is set using two PS Keys, PSKEY_PCM_CONFIG32 and PSKEY_PCM_LOW_JITTER_CONFIG. They are summarized in Table 9 and Table 10below. The default for PSKEY_PCM_CONFIG32 key is 0x00800000 i.e. first slot following sync is active, 13-bit linear voice format, long frame sync and interface master generating 256kHz PCM_CLK from 4MHz internal clock with no tri-stating of PCM_OUT. Table 9 PSKEY_PCM_CONFIG32 Description Name Bit position lu Set to 0 oSy Description 0 selects Master mode with internal generation of SLAVE MODE EN SHORT SYNC EN PCM_CLK and PCM_SYNC. 1 selects Slave mode requiring externally generated PCM_CLK and PCM_SYNC. This should be set to 1 if 48M_PCM_CLK_GEN_EN (bit 11) is set. 0 selects long frame sync (rising edge indicates start of frame), 1 selects short frame sync (falling edge indicates start of frame). 21 / 37 i40e Datasheet Set to 0 0 selects padding of 8 or 13-bit voice sample into a 16- bit slot by inserting extra LSBs, 1 selects sign extension. When SIGN EXTENDED EN oSy padding is selected with 3-bit voice sample, the 3 padding bits are the audio gain setting; with 8-bit samples the 8 lei padding bits are zeroes. LSB FIRST EN Blu TX TRISTATE EN TX TRISTATE RISING EDGE EN 0 transmits and receives voice samples MSB first, 1 uses LSB first. 0 drives PCM_OUT continuously, 1 tri-states PCM_OUT immediately after the falling edge of PCM_CLK in the last bit of an active slot, assuming the next slot is not active. 0 tristates PCM_OUT immediately after the falling edge of oSy PCM_CLK in the last bit of an active slot, assuming the next slot is also not active. 1 tristates PCM_OUT after the rising edge of PCM_CLK. lei 0 enables PCM_SYNC output when master, 1 suppresses SYNC SUPPRESS EN PCM_SYNC whilst keeping PCM_CLK running. Some lu CODECS utilize this to enter a low power state. GCI MODE EN MUTE EN 1 enables GCI mode. 10 1 forces PCM_OUT to 0. 0 sets PCM_CLK and PCM_SYNC generation via DDS from 48M PCM CLK GEN 11 EN internal 4 MHz clock, as for BlueCore4-External. 1 sets oSy PCM_CLK and PCM_SYNC generation via DDS from internal 48 MHz clock. lei 0 sets PCM_SYNC length to 8 PCM_CLK cycles and 1 sets LONG LENGTH SYNC 12 EN length to 16 PCM_CLK cycles. Only applies for long frame lu sync and with 48M_PCM_CLK_GEN_EN set to 1. [20:16] MASTER CLK RATE Set to 0b00000. Selects 128 (0b01), 256 (0b00), 512 (0b10) kHz PCM_CLK [22:21] frequency when master and 48M_PCM_CLK_GEN_EN (bit ACTIVE SLOT 11) is low. [26:23] Default is 0001. Ignored by firmware oSy Selects between 13 (0b00), 16 (0b01), 8 (0b10) bit sample SAMPLE_FORMAT [28:27] with 16 cycle slot duration 8 (0b11) bit sample 8 cycle slot lu duration. Table 10 PSKEY_PCM_LOW_JITTER_CONFIG Description Name CNT LIMIT CNT RATE SYNC LIMIT Bit position Description [12:0] Sets PCM_CLK counter limit [23:16] Sets PCM_CLK count rate. [31:24] Sets PCM_SYNC division relative to PCM_CLK. 22 / 37 i40e Datasheet 5 Software Stacks oSy BlueSoleil i40e is supplied with Bluetooth v2.1 + EDR compliant stack firmware, which runs on the internal RISC microcontroller. i40e’s software architecture allows Bluetooth processing and the lei application program to be shared in different ways between the internal RISC microcontroller and an external host processor (if any). Blu 5.1 BlueSoleil Stack The BlueSoleil stack is illustrated in Figure 14 below. HFP/HSP oSy PBAP/MAP lei OBEX/FTP/OPP Blu Application AT CMD SDP oSy BlueSoleil Firmware Link Manager I/O RAM Analogue RFCOMM Host Controller Interface GPIO PCM/I2S A2DP/AVRCP L2CAP/eL2CAP UART/USB Host (ARM/MCU/ Any CPU) SPP Baseband DSP MCU Hardware Radio i40e Solution oSy Figure 14 BlueSoleil Stack In this version of the stack firmware shown no host processor is required to run the Bluetooth lu protocol stack. All BlueSoleil stack layers, including application software, run on the internal RISC processor. The host processor interfaces to BlueSoleil stack via one or more of the physical interfaces. The most common interfacing is done via UART interface using the ASCII commands supported by the BlueSoleil stack. With these ASCII commands the user can access Bluetooth functionality without paying any attention to the complexity, which lies in the Bluetooth protocol stack. The user may write applications code to run on the host processor to control BlueSoleil stack 23 / 37 i40e Datasheet with ASCII commands and to develop Bluetooth applications. Please refer to BlueSoleil i40e’s programming manuals: BlueSoleil_i40e_SPP_programming_manual.pdf or BlueSoleil_i40e_Multi_programming_manual.pdf. 6 Enhanced Data Rate oSy lei Blu EDR has been introduced to provide 2x and optionally 3x data rates with minimal disruption to higher layers of the Bluetooth stack. CSR supports both of the new data rates, with i40e. i40e is compliant with revision v2.0.E.2 of the specification. 6.1 Enhanced Data Rate Baseband oSy At the baseband level EDR uses the same 1.6kHz slot rate as basic data rate and therefore the lei packets can be 1, 3, or 5 slots long as per the basic data rate. Where EDR differs from the basic data rate is that in the same 1MHz symbol rate 2 or 3bits are used per symbol, compared to 1bit per Blu symbol used by the basic data rate. To achieve the increase in number of bits symbol, two new modulation schemes have been introduced as summarized in Table 11 below, and the modulation schemes are explained in the further sections. Table 11 Data Rate Schemes Blu oSy lei Although the EDR uses new packets Link establishment and management are unchanged and still use Basic Rate packets. 6.2 Enhanced Data Rate _/4 DQPSK 4 DQPSK includes the following features: 4-state Differential Phase Shift Keying. lu 4-state Differential Phase Shift Keying. oSy 2 bits determine phase shift between consecutive symbols. Refer to Table 12 below. S/4 rotation avoids phase shift of S, which would cause large amplitude variation. Raised Cosine pulse shaping filter to further reduce side band emissions. Table 12 2 bits Determine Phase Shift between Consecutive Symbols 24 / 37 i40e Datasheet oSy lei 6.3 8DQPSK Blu 8DQPSK includes the following features: 8-state Differential Phase-Shift Keying. Refer to Figure 15 below. Three bits determine phase shift between consecutive symbols. Refer to Table 13 below. Table 13 3 bits Determine Phase Shift between Consecutive Symbols Blu oSy lei Blu oSy lei lu oSy Figure 15 8DQPSK 25 / 37 i40e Datasheet 7 Re-flow Temperature-time profile oSy The re-flow profiles are illustrated in Figure 16 and Figure 17 below. lei Temp.(0C) Blu 40+20/-15s 2300C~2450C 2170C oSy 1500C~1900C lei 90+30/-30s Blu Time(S) Figure 16 Typical Lead-free Re-flow Solder Profile Blu 2170C oSy lei lu 2420C oSy Figure 17 Typical Lead-free Re-flow 26 / 37 i40e Datasheet The soldering profile depends on various parameters according to the use of different solder and material. The data here is given only for guidance on solder re-flow. i40e will withstand up to two re-flows to a maximum temperature of 245°C. oSy 8 Reliability and Environmental Specification lei Blu 8.1 Temperature test Put the module in demo board which uses exit power supply, power on the module and connect to mobile. Then put the demo in the ‐40℃ space for 1 hour and then move to +85℃ oSy space within 1minute, after 1 hour move back to ‐40℃ space within1 minute. This is 1 cycle. The lei cycles are 32 times and the units have to pass the testing. Blu 8.2 Vibration Test The module is being tested without package. The displacement requests 1.5mm and sample is vibrated in three directions(X,Y,Z).Vibration frequency set as 0.5G , a sweep rate of 0.1 oSy octave/min from 5Hz to 100Hz last for 90 minutes each direction. Vibration frequency set as 1.5G, lei a sweep rate of 0.25 octave/min from 100Hz to 500Hz last for 20 minutes each direction. Blu 8.3 Desquamation test Use clamp to fix the module, measure the pull of the component in the module, make sure the module`s soldering is good. 8.4 Drop test lu oSy Free fall the module (condition built in a wrapper which can defend ESD) from 150cm height to cement ground, each side twice, total twelve times.The appearance will not be damaged and all functions OK. 27 / 37 i40e Datasheet 8.5 Packaging information oSy After unpacking, the module should be stored in environment as follows: lei Temperature: 25℃ ± 2℃ Blu Humidity: <60% No acidity, sulfur or chlorine environment The module must be used in four days after unpacking. oSy 9 Layout and Soldering Considerations 9.1 Soldering Recommendations Blu BlueSoleil i40e is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and particular type of solder paste used. Consult the datasheet of oSy particular solder paste for profile configurations. lei IVT Corporation will give following recommendations for soldering the module to ensure reliable solder joint and operation of the module after soldering. Since the profile used is process Blu and layout dependent, the optimum profile should be studied case by case. Thus following recommendation should be taken as a starting point guide. 9.2 Layout Guidelines oSy It is strongly recommended to use good layout practices to ensure proper operation of the module. Placing copper or any metal near antenna deteriorates its operation by having effect on lu the matching properties. Metal shield around the antenna will prevent the radiation and thus metal case should not be used with the module. Use grounding vias separated max 3 mm apart at the edge of grounding areas to prevent RF penetrating inside the PCB and causing an unintentional resonator. Use GND vias all around the PCB edges. The mother board should have no bare conductors or vias in this restricted area, because it is not covered by stop mask print. Also no copper (planes, traces or vias) are allowed in this area, because of mismatching the on-board antenna. 28 / 37 i40e Datasheet oSy lei Blu Blu oSy lei Figure 18 i40e Restricted Area Following recommendations helps to avoid EMC problems arising in the design. Note that each design is unique and the following list do not consider all basic design rules such as avoiding capacitive coupling between signal lines. Following list is aimed to avoid EMC problems caused by RF part of the module. Use good consideration to avoid problems arising from digital signals in oSy the design. lei Ensure that signal lines have return paths as short as possible. For example if a signal goes to an inner layer through a via, always use ground vias around it. Locate them tightly and Blu symmetrically around the signal vias. Routing of any sensitive signals should be done in the inner layers of the PCB. Sensitive traces should have a ground area above and under the line. If this is not possible, make sure that the return path is short by other means (for example using a ground line next to the signal line). 10 Physical Dimensions lu oSy BlueSoleil i40e’s dimension is 27mm(L)x13mm(W)x2.2mm(H). 29 / 37 i40e Datasheet oSy lei Blu Blu oSy lei Blu oSy lei Figure 19 i40e Footprint 11 Package lu oSy BlueSoleil i40e package information is summarized in Figure 20 and Figure 21 below. 30 / 37 i40e Datasheet oSy lei Blu Blu oSy lei oSy Figure 20 Reel Information Blu lei lu oSy 31 / 37 i40e Datasheet oSy lei Blu Blu oSy lei Blu oSy lei Figure 21 Tape Information 12 Certification lu 12.1 Bluetooth oSy BlueSoleil i40e is qualified as a Bluetooth controller subsystem and it fulfills all the mandatory requirements of Bluetooth 2.1 + EDR core specification. If not modified in any way, it is a complete Bluetooth entity, containing software and hardware functionality as well as the whole RF-part including the antenna. This practically translates to that if the module is used without modification of any kind, it does not need any Bluetooth approval work for evaluation on what needs to be tested. 32 / 37 i40e Datasheet i40e Qualified Design ID (QDID): B019398 oSy lei Blu Blu oSy lei Blu oSy lei Figure 22 B019398 Certificate 12.2 Korea KCC lu oSy According to Korean regulations the OEM integrator using a surface mountable module, such as i40e, will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate authorization for the radio. I40e is fully tested to meet the technical requirements of a radio for Korean market. The declaration is as follows: Certificate No.: KCC-CRM-iVT-I40e 33 / 37 i40e Datasheet Trade Name or Applicant: IVT Corporation Equipment Name of the Specified Radio: oSy Equipment certified by Type Trademark: BlueSoleil Basic Model Number: i40e lei Serial Model Number: N/A 12.3 Japan BlTELEC Manufacturer/Country of Origin: According to Japanese regulations the OEM integrator using a surface mountable module, such oSy as i40e, will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate authorization for the radio. BlueSoleil i40e is fully tested to meet the technical lei requirements of a radio for Japanese market. The declaration is as follows: Blu Certificate No.: 204-240010 PHOENIX TESTLAB GmbH, operating as a Registered Certification Body (RCB ID:204) with respect to Japan, declares that the listed product complies with the Technical Regulations conformity Certification of Specified Radio Equipment (ordinance of MPT N0 .37, 1981), Article 2, Paragraph 1, Item 19. Product description: Bluetooth 2.1+EDR Module Trademark/Model Name: BlueSoleil / i40e Family name: Serial No: -- Blu -- oSy lei Software Release No: -- Type of emissions: F1D/G1D Frequency and power: Bluetooth 2.1+EDR:2402~2480MHz;79 ch;0.09 mW/MHz Manufacturer: IVT Corporation lu Address: 5/F, Fa Zhan Building No. 12 Shang Di Xin Xi Road City: Country: oSy Beijing 100085 China This Certificate is granted to: Certificate holder: IVT Corporation 34 / 37 i40e Datasheet Address: 5/F, Fa Zhan Building No. 12 Shang Di Xin Xi Road City: Beijing 100085 Country: China oSy lei 12.4 FCC Blu Host manufacturer: IVT Corporation Limited Host Brand name: BlueSoleil Host model number: i40e FCC ID: S78-IVTI40E 12.5 IC Blu Host manufacturer: IVT Corporation Host Brand name: BlueSoleil oSy lei Host model number: i40e IC: 11004A-IVTI40E oSy This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. lei This device complies with Part 15 of the FCC Rules and with RSS-210 of Industry Canada. Blu Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. oSy L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si lu le brouillage est susceptible d'en compromettre le fonctionnement. This Class B digital apparatus complies with Canadian ICES-003. Cet appareil numérique de la classe B est conforme à la norme NMB-003 du Canada. NOTE: The manufacturer is not responsible for any radio or TV interference caused by unauthorized modifications or changes to this equipment. Such modifications or changes could void the user’s authority to operate the equipment. NOTE: This equipment has been tested and found to comply with the limits for a Class B digital 35 / 37 i40e Datasheet device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the oSy instructions, may cause harmful interference to radio communications. guarantee that interference will not occur in a particular installation. However, there is no If this equipment does cause lei harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the Blu following measures: - Reorient or relocate the receiving antenna. - Increase the separation between the equipment and receiver. -Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. oSy -Consult the dealer or an experienced radio/TV technician for help. 12.6 Bluetooth Technology Best Developed Corporation IVT Corporation is one of Bluetooth technology BEST developed together which is authenticated by The Bluetooth SIG. See Figure 23 below. Blu oSy lei oSy Figure 23 IVT is One of Bluetooth Technology BEST Developed Together 13 Contacts Blu Contact: Mr. Zhu Yong Mobile: +86 18910255873 Tel: +86 10 82898219 Fax: +86 10 62963059 36 / 37 i40e Datasheet Email: embedded@ivtcorporation.com Address: IVT Corporation. 5/F, Fa Zhan Building No.12, Shang Di Xin Xi Road, Beijing, 100085 P.R. China Company Site: www.ivtcorporaiton.com oSy Support: support@ivtcorporation.com 14 Copyright lei Blu Copyright © 1999-2012 IVT Corporation All rights reserved. IVT Corporation assumes no responsibility for any errors which may appear in the specification. oSy Furthermore, IVT Corporation reserves the right to alter the hardware, software, and/or specification detailed here at any time without notice and does not make any commitment to update the information contained here. lei BlueSoleil is a registered trademark of IVT Corporation for Bluetooth production. Blu The Bluetooth trademark is owned by The Bluetooth SIG Inc., USA and is licensed to IVT Corporation. All other trademarks listed herein are owned by their respective owners. Blu oSy lei lu oSy 37 / 37
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