Jorjin Technologies WG1300E00 Wireless LAN EM board for Module (802.11 bg) User Manual CC3000 WG1300E00 UG R01 20120302

Jorjin Technologies Inc. Wireless LAN EM board for Module (802.11 bg) CC3000 WG1300E00 UG R01 20120302

Contents

User Manual

Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL     a module solution provider     WG1300-00 EM Board        User Guide Revision 0.1
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 1Index  1. INTRODUCTION…………………………………………………………………1 2. WG1300-00 EM BOARD ........................................................................................ 2 2.1. TOP SIDE ............................................................................................................. 2 2.2. BOTTOM SIDE ....................................................................................................  5   2.3. Hardware setup…………………………………………………………………7   2.4. Schematics……………………………………………………………………...8     2.5. Bill of Material (BOM)………………………………………………………...9 3. APPLICATION EXAMPLES………………………………………………...…10 4. HISTORY CHANGE ............................................................................................. 11
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 21.   INTRODUCTION     The purpose of this user guide is to help user understanding how to use WG1300-00 EM (Evaluation Module) board to complete hardware setup for test to evaluate the performances of CC3000-WG1300-00 SiP Module.  2.  WG1300-00 EM BOARD   In the following sub-sections, it’ll divide into TOP and BOTTOM Side to explain details on the key parts and its features.   2.1.  TOP Side Figure 1 is TOP-Side picture of WG1300-00 EM Board.  Figure 1. TOP Side of WG1300-00 EM Board  The picture above marks some key parts and jumpers and Table 1 below shows the explanations to them in the details.   J3J2  J5J4  J1Antenna CC3000-WG1300-00 Module
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 3 Items  Key Parts  Descriptions  1  CC3000-WG1300-00 Module The core module for performance evaluation. It’s related feature can be referred to its datasheet. 2  Antenna  It can used for radiated test by reworking cpacitor to correct pads. 3  J1  It’s a U.FL RF connector via which you can proceed conducted power test.   4   J2 It is a jumper via which we can swap testing modes, test mode and operation mode. When pin 2 and pin 3 are shorted, it runs in operation mode and it operate in test mode when pin 1 and pin 2 are shorted.   5   J3 It is a jumper for testing power consumption. In operation mode, pins of the jumper is shorted. For power testing, the jumper is removed and ammeter crosses the pins to do the testing. 6  J4  Refer to Table 2. For more details on these through-hole test points   7  J5  Refer to Table 3. For more details on these through-hole test points Table 1. TOP-Side Key parts of WG1300-00 EM Board  Table 2 below shows the signal descriptions of J4 Pin Number  Pin Name  Pin Type  Descriptions 1 GND    Ground 2  NS_UARTD  I/O  Networking subsystem UART Debug line   3 FUNC4  --  Leave floating 4  WL_UART_DBG  I/O  UART Debug Line 5  WL_RS232_TX  O  Test RS232 transmit output; Leave floating for normal operation  6  WL_RS232_RX  I  Test RS232 receive output; Leave floating
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 4for normal operation 7 GND    Ground 8  WL_SPI_CS  I  Host interface SPI Chip Select 9  WL_SPI_DOUT  O  Host interface SPI Data Ouput 10 WL_SPI_IRQ O  Host Interface SPI Interrupt Request 11  WL_SPI_DIN  I  Host Interface SPI Data Input 12 WL_SPI_CLK I  Host interface SPI Clock input Table 2. TOP-Side J4 of WG1300-00 EM Board  Table 3 below shows the signal descriptions of J5 Pin Number  Pin Name  Pin Type  Descriptions  1  SCL_CC3000  O I2C Clock signal output from CC3000. This pin is connected to SCL_EEPROM via a 0-Ohm resister and is not used by end users.  2  SCL_EEPROM  I I2C Clock signal input from EEPROM inside CC3000-WG1300-00 SiP Module. This pin is connected to SCL_CC3000 via a 0-Ohm resister and is not used by end users.  3  SDA_CC3000  I/O I2C Data signal from CC3000. This pin is connected to SDA_EEPROM via a 0-Ohm resister and is not used by end users.  4  SDA_EEPROM  I/O I2C Data signal from EEPROM inside CC3000-WG1300-00 SiP Module. This pin is connected to SDA_CC3000 via a 0-Ohm resister and is not used by end users. 5  VBAT_SW_EN  I  Active-high enable signal from Host device. 6 GND   Ground 7 GND   Ground   8   VIO_HOST   PI VIO power supply from HOST to Module. For MSP430 Host platform, VIO_HOST=VBAT_IN. For other platforms which have different voltage levels from
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 5Battery voltages’, R14 can be remove to support such a case.   9   VBAT_IN   PI Battery voltage input to Module. For MSP430 Host platform, VIO_HOST=VBAT_IN. For other platforms which have different voltage levels from Battery voltages’, R14 can be remove to support such a case. 10 GND   Ground  11  EXT_32KHz  I External Slow Clock input from Host device. It can be used for the SiP Module inside which hasn’t slow clock source.   Table 3. TOP-Side J5 of WG1300-00 EM Board  2.2.  BOTTOM Side Figure 2 is BOTTOM-Side picture of WG1300-00 EM Board.  Figure 2. Bottom Side of WG1300-00 EM Board  There are two EM Board mating connectors which are used for connecting to Host platform and are mounted on the bottom side as the picture above. Table 4 and Table 5 show the descriptions on the J6 J7
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 6signals brought out from these two EM mating connectors.  J6 Pin Number Pin Name  Module Pin Type Description 1 GND   Ground  5  EXT_32KHz  I External Slow Clock input from Host device. It can be used for the SiP Module inside which hasn’t slow clock source. 10  VBAT_SW_EN  I  Active-high enable signal from Host device. 12 WL_SPI_IRQ  O  Host Interface SPI Interrupt Request 14  WL_SPI_CS  I  Host interface SPI Chip Select 16 WL_SPI_CLK  I  Host interface SPI Clock input 18  WL_SPI_DIN  I  Host Interface SPI Data Input 19 GND   Ground 20  WL_SPI_DOUT  O  Host interface SPI Data Ouput Table 4. BOTTOM-Side J6 of WG1300-00 EM Board  J7 Pin Number Pin Name  Module Pin Type Description 2 GND   Ground 7  VBAT_IN  PI  Battery voltage input to Module 9  VBAT_IN  PI  Battery voltage input to Module 15  EXT_32KHz  I  External Slow Clock input from Host device. Table 5. BOTTOM-Side J7 of WG1300-00 EM Board
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 72.3.  Hardware Setup Before conducting performance test, EM Board should be connected to Host platform, either with mating connectors, J6 and J7, or single row headers, J4 and J5. For the case of using EM mating connector for hardware connection, the mating EM connector should be lined up and spaced 1.2” apart as Figure 3 below     Figure 3. Host PCB Mating Connector Arrangement  For the case of using single row headers, the necessary signals as the ones brought out from EM mating connector need to be wired to Host platform.
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 82.4.  Schematics Figure 4 is the schematics of WG1300-00 EM Board  R14 0RRES1608SCL_CC3000EEPROM select:  Test mode => R1,R2 - NL  Functional mode => R1,R2 - 0R to shortVBAT_IN: 2.7V~4.8V => 3.3V TYPVIO_HOST: Voltage of Host Level (1.2V~3.6V)SCL_CC3000SCL_EEPROMSDA_CC300SDA_EEPROMVBAT_SW_ENVIO_H OSTC310pFCAP1005J1U.FL-R-SMT(10)U.FL 123L2NLIND1005C110pFCAP1005L1NLIND1005 C2NL_10pFCAP1005ANT1AT8010AT801012VIO_HOST=VBAT_IN in MSP430 caseVBAT_INR21 0RRES1005EXT_32KHzR1 0R RES1005EXT_32KHz R20 0RRES1005C41uFCAP1005EXT_32KHzVBAT_SW_ENVBAT_INJ3HEADER 1x2pitch 2.0-1x212WL_RS232_TXWL_RS232_RXWL_SPI_CSWL_SPI_DOUTWL_SPI_IRQWL_SPI_DINWL_SPI_C LKVBAT_INWG1300-00 ModuleWL_SPI_CLKWL_SPI_DINWL_SPI_IRQWL_SPI_DOUTWL_SPI_CSR190RRES1005R170RRES1005R150RRES1005R160RRES1005R180RRES1005WL_SPI_CLKWL_SPI_DINWL_SPI_IRQWL_SPI_DOUTWL_SPI_CSNS_UARTDFUNC4WL_UART_DBGJ4NL_HEADER 1x12pitch 2.0-1x12123456789101112SCL_EEPROMTest mode => 1-2 short to GNDFunctional mode => 2-3 shortR3 0R RES1005R6 0R RES1005R9 0R RES1005R8 0R RES1005R4 0R RES1005R11 0R RES1005R10 0R RES1005NS_UARTDFUNC4WL_UART_DBGWL_EN2WL_RS232_TXWL_RS232_RXWL_EN1J2HEADER 1x 3pitch 2.0-1x3123EM ConnectorR12 NL_0R RES1005 EXT_32KHzU1WG1300-00E-N46_13.5X16.3_TOPWL_UART_DBG4NS_UARTD2WL_EN17WL_EN25FUNC43WL_RS232_TX6WL_RS232_RX8EXT_32K 21GND 25GND9SCL_CC3000 30SCL_EEPROM 29SDA_C C3000 28SDA_EEPROM 27GND 22SPI_IRQ14SPI_DOUT13SPI_CS12SPI_CLK17SPI_DIN15VBAT_SW_EN 26VBAT_IN 19RF_ANT 35GND 31GND 33GND16GND 34VIO_H OST 23GND 32GND37GND38GND39GND40GND 41GND 42GND 43GND 44GND 46GND 45GND1GND18GND10GND 20VIO_SOC 24GND11 GND 36R5 0R RES1005 VBAT_SW_ENR13 0R RES1005R7 N L_1K RES1005Internal 32kHz => R13 short to GNDExternal 32kHz => R12 shortVIO_H OSTJ6SFM-110-02-L-D-Apitch 1.27-2x101357911131517192468101214161820R2 0R RES1005SDA_CC300SDA_EEPROMC51uFCAP1005J7SFM-110-02-L-D-Apitc h 1. 27-2x 101357911131517192468101214161820Connect to RF1Header for DebugJ5NL_HEADER 1x11pitc h 2. 0-1x111234567891011Connect to RF2Test mode => R7 - 1K to PU  Figure 4. Schematics of WG1300-00 EM Board
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 92.5.  Bill Of Material (BOM) Table 6. BOM of WG1300-00 EM Board  Items  Reference Designator  Description 1  U1  TI CC3000 WiFi b/g Module (BM) 2  ANT1  ANT / 2.4GHZ / Peak Gain 2.5DB 3  J1  Mini RF Header Receptacle 4  J2  CON Male 1x3 / Pitch 2.0 mm 5  J3  CON Male 1x2 / Pitch 2.0 mm  6  J6,J7  Female Header / Fool Proof H:4.3 / 2x10 /  Pitch 1.27mm / SMT 7  C1,C3  CAP 0402 / 10pF / 50V / NPO / ±5% 8  C4,C5  CAP 0402 / 1uF / X5R / 6.3V / ±10% / HF  9 R1,R2,R3,R4,R5,R6,R8,R9, R10,R11,R13,R15,R16, R17,R18,R19,R20,R21 RES 0402 / 0R / Jumper 10  R14  RES 0603 / 0R / Jumper
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 10 3.  APPLICATION DEVELOPMENT Texas Instrument had developed a HOST platform, MSP-EXP430FR5730, for evaluating CC3000-based SiP Module. Figure 4 shows the platform and WG1300-00 EM Board  Figure 4. MSP-EXP430FR5730 and WG1300-00 EM Board  The MSP-EXP430FR5739 test platform can be ordered as the link below. http://www.ti.com/tool/msp-exp430fr5739  Specific application examples can refer to the link below http://processors.wiki.ti.com/index.php/CC3000 Wi-Fi for MCU
                      Doc No: WG1300-00 EM Board-UG-D01                                                                                        Copyright © JORJIN TECHNOLOGIES INC. 2012 http://WWW.JORJIN.COM.TW CONFIDENTIAL Page 11 4.  HISTORY CHANGE Revision  Date  Description R 0.1  2012/2/28  Release 0.1

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