HARRIS TR-0017-E Sitepro Base Station User Manual TX Synth

HARRIS CORPORATION Sitepro Base Station TX Synth

TX Synth

Maintenance ManualLBI-38640GVHF TRANSMITTER SYNTHESIZER MODULE 19D902780G1TABLE OF CONTENTS PageDESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Front CoverGENERAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1CIRCUIT ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1VOLTAGE CONTROLLED OSCILLATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1RF AMPLIFIERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1REFERENCE BUFFER AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2PRESCALER AND SYNTHESIZER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2LOOP BUFFER AMPLIFIERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2AUDIO FREQUENCY AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2VOLTAGE REGULATORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 LOGIC CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2TEST PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2ALIGNMENT PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3TROUBLESHOOTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3OUTLINE DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4ASSEMBLY DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5SCHEMATIC DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6PARTS LIST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9PRODUCTION CHANGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10IC DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11DESCRIPTIONThe principle function of the Transmitter SynthesizerModule is to provide the RF excitation for input to theMASTR III station power amplifier. The output of the syn-thesizer is a frequency modulated signal at the desired fre-quency. The module contains the following functionalblocks:•A voltage controlled oscillator.•A chain of integrated circuit RF Amplifiers. •A reference buffer amplifier.•Dual modulus prescaler and synthesizer integratedcircuits.•Loop amplifiers and passive loop filter.•An audio amplifier and a pre-modulation integrator.•IC voltage regulators for +5 and -5 Vdc. A discretecomponent regulator for +8 Vdc, and an Opera-tional Amplifier regulator for +4 Vdc.•Logic circuitry: address decoder, input signal gates,and a lock indicator circuit. M/A-COM Wireless Systems3315 Old Forest RoadLynchburg, Virginia 24501(Outside USA, 434-385-2400) Toll Free 800-528-7711www.macom-wireless.com Printed in U.S.A.
Copyright © 1992-2002, M/A-COM Private Radio Systems, Inc. All rights reserved.Table 1 - General SpecificationsITEM SPECIFICATIONFREQUENCY RANGE 136 to 174 MHzin 4 bands 136 to 144 MHz142 to 152 MHz150 to 162 MHz160 to 174MHzRF POWER OUT(50 Ohm load) 10 to 13 dBm (10 to 20 mW)RF HARMONICS <-30 dBcNON-HARMONIC SPURS 1 to 200 MHz <-90 dBc 200 MHz to 1 GHz <-60 dBcCARRIER ATTACK TIME <50 msREFERENCE INPUTinput level 0 dBm ±1.5dBinput impedance 50 Ohmfrequency 5 to 17.925 MHz (must be integer divisible bychannel spacing)MODULATION SENSITIVITY 5 kHz peak dev/1 VrmsAF INPUT IMPEDANCE 600 Ohm AF RESPONSE10 Hz ±1.5 dB1000 Hz 0 dB reference3 kHz ±1.5 dB10 Hz SQUARE WAVE MODULATION <10%Sq wave droopHUM & NOISE -55 dBPOWER REQUIREMENTS 13.8 Vdc @ 275 mA-12.0 Vdc@ 10 mACIRCUIT ANALYSISVOLTAGE CONTROLLED OSCILLATORTransistor Q1 and associated circuitry comprise a low noiseVoltage Controlled Oscillator (VCO). Inductor L1 and associ-ated capacitors form the oscillator resonant circuit (tank). Thenoise characteristic of this oscillator is dependent on the Q ofthis resonant circuit. The components used in the tank arespecified to have especially high Q. Diode D1 aids in settingthe bias point for low noise operation. (Any field replacementof oscillator parts should use identical parts).Switches SWIA, SWIB, SWIC and SWID set the fixedcapacitance in the tank and therefore set the frequency rangeover which the oscillator can be voltage tuned. Table 2 showsthe switch settings for the various frequency ranges.Switches SW1E (SW#5) and SW1F (SW#6) also set thefixed capacitance in the tank and perform the frequencytrimming function. These two switches are factory set andshould not need resetting unless any oscillator componentsare changed. (See alignment procedure section of this man-ual for instructions on resetting SW1E and SW1F).The oscillator frequency is voltage tuned by the signalapplied through R5 and L5 to the two varicap diodes D2 andD3. Additionally, audio modulation is applied as an AFvoltage to the two varicap diodes. This AF voltage varies theoscillator frequency at an audio rate (i.e., it frequency modu-lates the oscillator). Low frequency audio is applied alongwith the varicap control voltage through R5 and L5 whilehigh frequency audio (MOD) is applied via C16. Resistors R6 through R9 provide a two volt negative biason the varicap diodes.Figure 1 - Block DiagramTransistors Q101 and Q102 and associated circuitry formthe oscillator enable switch. This switch allows the stationcontrol circuitry to turn the VCO ON or OFF via theANT_REL line. Setting the ANT_REL line to a logic lowcauses Q102 to conduct. The five (5) volt output at Q102collector (OSCON) enables the fault indicator gates, U705Cand U705D, and turns on Q101. Q101 starts to conduct,providing a ground path for Q1. This turns ON the VCO.RF AMPLIFIERS Integrated circuits U201 and U202 and U203 and tran-sistor Q201 form a chain of RF amplifiers. These amplifiersserve two purposes; amplifying the RF signal for input to thepower amplifier and providing a signal to the Phase-LockedLoop (PLL) . Integrated circuits U201, U203 and transistor Q201provide amplification for the RF signal which will be fed tothe station power amplifier. U201 operates with a gain ofabout 5 dB. Its output is fed to a resistive signal splittercomposed of R203 through R210. One of the resistive signal splitter outputs drives U203.U203 operates with a gain of about 10 dB. Q201 and associ-ated circuitry comprise the output amplifier which has a gainof about 6 dB. This amplifier is followed by a 190 MHzcutoff low -pass filter (C216, C217, L203 and L204) and a 6dB resistive attenuator (R219 through R221). The final out-put at the front panel BNC connector (J2) is nominally 11.5dBm into a 50 ohm load.Table 2 - Frequency Range Switch SettingsFREQUENCYRANGE (MHz) SW1A (SW#1) SW1B(SW#2) SW1C(SW#3) SW1D(SW#4)160-174 OPEN OPEN OPEN OPEN150-162 CLOSED OPEN CLOSED OPEN142-152 OPEN CLOSED OPEN CLOSED136-143 CLOSED CLOSED CLOSED CLOSEDLBI-38640G1
The other output of the resistive splitter drives U202.U202 is a buffer amplifier with a gain of about 10 dB. U202drives the synthesizer prescaler (i.e. it provides a signal tothe PLL).REFERENCE BUFFER AMPLIFIERTransistor Q401 and associated components comprise abuffer amplifier for the reference oscillator signal. (Thereference oscillator signal is produced by the receiver syn-thesizer module of a MASTR III station.) The 0 dBm refer-ence oscillator signal is fed through the front panel BNCconnector J1. Resistor R405 provides a 50 ohm load to thereference oscillator. The output of the Reference BufferAmplifier is fed directly to the synthesizer integrated circuit.The output level at TP9 is approximately 3 volts peak topeak.PRESCALER AND SYNTHESIZERIntegrated circuit U402 is the heart of the synthesizer. Itcontains the necessary frequency dividers and control cir-cuitry to synthesize output frequencies by the technique ofdual modulus prescaling. U402 also contains an analogsample and hold phase detector and a lock detector circuit.Within the synthesizer (U402) are three programmabledividers which are loaded serially using the CLOCK, DATA,and ENABLE inputs (pins 11, 12, and 13 respectively). Aserial data stream (DATA) on pin 12 is shifted into internalshift registers by low to high transitions on the clock input(CLOCK) at pin 11. A logic high (ENABLE) on pin 13 thentransfers the program information from the shift registers tothe divider latches.The reference signal is applied to U402 pin 2 and dividedby the "R" divider. This divides the reference signal down toa divided reference frequency (Fr). The typical referencefrequency is 12.8 MHz and the typical divided referencefrequency is 5 kHz providing for synthesizer steps of 5 kHzfor use with both 25 kHz and 30 kHz channel spacing. Otherchannel spacings are possible by providing proper program-ming. The "A" and "N" dividers process the loop feedbacksignal provided by the VCO (by way of the dual modulusprescaler U401). The output of the "N" divider is a dividedversion of the VCO output frequency (Fv).Synthesizer U402 also contains logic circuitry to controlthe dual modulus prescaler U401. If the locked synthesizeroutput frequency is 150 MHz. The prescaler output nomi-nally will be equal to 2.34375 MHz (150 MHz/64). Thisfrequency is further divided down to Fv by the "N" dividerin U402. Fv is then compared with Fr in the phase detectorsection.The phase detector output voltage is proportional to thephase difference between Fv and Fr. This phase detectoroutput serves as the loop error signal. This error signalvoltage tunes the VCO to whatever frequency is required tokeep Fv and Fr locked (in phase).LOOP BUFFER AMPLIFIERS AND LOOPFILTERThe error signal provided by the phase detector output isbuffered by operational amplifiers (op-amp) U501A andU501B. The audio modulation signal from U601B is alsoapplied to the input of U501B. The output of U501B is thesum of the audio modulation and the buffered error signal.The output of the second buffer (U501B) is applied to aloop filter consisting of R506, R507, R508, C505 and C506.This filter controls the bandwidth and stability of the synthe-sizer loop. The VHF transmitter synthesizer has a loopbandwidth of only several Hertz. This is very narrow, result-ing in an excessively long loop acquisition time. To speedacquisition, switches U502A and U502C bypass the filtercircuit whenever an ENABLE pulse is received by the InputGates.AUDIO FREQUENCY AMPLIFIERThe transmitter synthesizer audio input line is fed toU601A. U601A is configured as a unity gain op-amp. Resis-tor R601 sets the 600 ohm input impedance of this amplifier.(NOTE: Data for digital modulation is fed to the synthesizerthrough the audio input line).The amplifier output is split into two components and fedto two variable resistors VR601 and VR602. VR601 sets thelevel in the low frequency audio path and VR602 sets thelevel in the high frequency audio path. (There is no clearbreak between the low and high frequency ranges. All voicefrequencies are within the high frequency range. The lowfrequency range contains low frequency data components).The wiper of VR601 (low frequency path) connects tothe input of U601B, the pre-modulation integrator. U601Bperforms the function of a low-pass filter and integrator. Theintegrator output is summed with the PLL control voltage atthe input of loop buffer amplifier U501B. This integratedaudio signal phase modulates the VCO. The combination ofpre- integration and phase modulation is equivalent to fre-quency modulation.The wiper of VR602 (high frequency path) is connectedto the modulation input of the VCO through C16.VOLTAGE REGULATORSU301 and U303 are monolithic voltage regulators (+5Vdc and -5 Vdc respectively). These two voltages are usedby synthesizer circuitry. The +5 V regulator output is alsoused as a voltage reference for the +8 Vdc discrete regulatorcircuit. U302A, Q302 and associated circuitry comprise the +8 voltregulator. Most module circuitry is powered from the +8 voltline. The regulator is optimized for especially low noise per-formance. This is critical because the low noise VCO is pow-ered by the +8 volt line.The +8 Vdc line also feeds the +4 Vdc regulator, U302Band associated resistors. The +4 Vdc regulator provides a biasvoltage for several op-amps in the module.LOGIC CIRCUITSLogic circuitry (other than that inside the synthesizer IC -U402) consists of the following:•An address decoder•Input gates and level shifters•Lock Indicator circuitryThe address decoder, U702, enables the Input Gates whenthe A0, A1, and A2 input lines receive the proper logic code(110 for the transmitter synthesizer). After receiving the propercode, Y3 (U702-12) sends a logic low signal to U701C. U701Cacts as an inverter and uses the logic high output to turn onInput Gates U701A, U701B, and U701D. The Input Gatesallow the clock, data and enable information to pass on to thesynthesizer via the level shifters. The Level Shifter TransistorsQ701, Q702 and Q703 convert the 5 volt gate logic level to the8 volt logic level required by the synthesizer U402. The Fault Indicator circuitry indicates when the synthe-sizer is in an out-of-lock condition. The fault detector latches,U705A and U705B are reset by the enable pulse during initialloading of data into the synthesizer. If at any time afterwardsthe lock detector signal (LD) goes low, the high output ofU705B will cause the output of gates U705C and U705D to golow. The low output from U705C causes Q704 to turn off, thusturning on the front panel LED (CR701). The output of U705D(FLAG) i s connected to J3-13C for external monitoring of theSynthesizer Module. A logic low on the FLAG line indicatesan out-of-lock condition.MAINTENANCERECOMMENDED TEST EQUIPMENTThe following test equipment is required to test the synthe-sizer Module:1. RF signal source for 12.8 MHz, 0 dBm reference (in-cluded with item 10)2. AF Generator or Function Generator3. Modulation Analyzer; HP 8901A, or equivalent, or aVHF receiver4. Oscilloscope; 20 MHz5. DC Meter; 10 meg ohm (for troubleshooting)6. Power Supply;13.8 Vdc @ 350 mA 12.0 Vdc @ 25mA7. Spectrum Analyzer; 0-1 GHz8. Frequency Counter; 10 MHz - 250 MHz9. Personal Computer (IBM PC compatible) to load fre-quency data10.Service Parts Kit, (TQ0650), (includes software forloading frequency data)TEST PROCEDURE(Steps 5, 6, and 7 can be done using a modulation analyzeror VHF receiver with 750us de-emphasis switchable in or out.1. Program synthesizer at 167.5 MHz using the SystemModule personality (or Test Software if using RFTest Fixture TQ-0650).Verify lock (flag = high)Verify front panel LED is off.2. Measure output frequency.Verify frequency = 167.5000 MHz ±100 Hz.3. Measure harmonic content (335 MHz, 502.5MHz).Verify 2nd harmonic is 30 dBc.4. Measure RF power output into 50 ohm load.Verify 10 to 13 dBm (10 to 20 mW).5. Measure AF distortion with standard modulating sig-nal input.Verify <5%.6. Measure Hum and Noise relative to 0.44 kHz averagedeviation, (de-emphasis on).Verify <-55dB7. Measure AF response at 300 Hz, 1 kHz (ref) and 3kHz, (de-emphasis off).Verify within ±1.5 dB with respect to 1 kHz refer-ence.8. Verify lock at different frequencies. a. Close switches SW1A and SW1C. b. Program synthesizer at 156 MHz. Verify LED is off.LBI-38640G2
c. Open switches SW1A and SW1C and closeswitches SW1B and SW1D.d. Program synthesizer at 147 MHz. Verify LED is off. e. Close switches SW1A, SW1B, SW1C andSW1D. f. Program synthesizer at 139.5 MHz.Verify LED is off. g. Open switches SW1A, SW1B, SW1C andSW1D. ALIGNMENT PROCEDURE1. Set all sections of SW1 to the open position.2. Apply +13.8 Vdc and -12 Vdc. Verify the currentdrain on the 13.8 volt supply is <300 mA and the cur-rent drain on the -12 volt supply is <20 mA.3. Program the synthesizer at 175 MHz. Set SW1E andSW1F (4 possible Combinations = both closed, bothopen, E open and F closed, or E closed and F open)to set Vtest (pin 23A of 96 pin connector) as close to6.0 volts as possible, but always between 5.5 and 6.5volts.4. Program synthesizer at 167.5 MHz for the followingthree adjustments•Set VR602 for 4.5 kHz peak deviation with a standardmodulating signal applied to the audio input.•Set VR601 for 4.4 kHz peak deviation with 1.0 Vrms,10 Hz sine wave audio applied to module AF input.•Apply a 10 Hz 1.4 Vpk square wave (same peak valueas 1.0 Vrms (sine wave) to module AF input. AdjustVR601 slightly for the flattest demodulated squarewave using a modulation analyzer or receiver (no de-emphasis) and an oscilloscope . The maximum netvariation in voltage over 1/2 cycle is 10%.The following service information applies when align-ing, testing, or troubleshooting the TX Synthesizer:•Standard Modulating Signal = 1 kHz sinusoidalvoltage, 1.0 Vrms at the module input terminals(600 ohm Rin).•The input audio level for setting the 4.5 kHz or 10Hz (or 7 Hz) deviation should always be 1.00Vrms.•In the modulation adjustment, any reference to 0.6Vrms refers to the voltage level for a STANDARDsignal, or usually 60% (3.0 kHz) of maximumdeviation. The 0.6 Vrms will produce 60% of fulldeviation.•Logic Levels:Logic 1 = high = 4.5 to 5.5 VdcLogic 0 = Low = 0 to 0.5 Vdc•Transmitter Synthesizer Address = A0 A1 A2= 110•Synthesizer data input stream is as follows:14-bit "R" divider most significant bit (MSB) =R13 through "R" divider least significant bit(LSB) = R010-bit "N" divider MSB = N9 through "N" dividerLSB = N07-bit "A" divider MSB = A6 through "A" dividerLSB = A0Single high Control bit (last bit)Latched When Control Bit = 1DATA ENTRY FORMATLatched WhenControl Bit = 1Data in Last A0 ---- A6 N0 ---- N9 R0 ---- R13 Bit LSB MSB LSB MSB LSB Control BitFor the transmitter synthesizer, 5 kHz channelspacingR=2560N = integer part of (frequency in kHz) / (320)A = (frequency in kHz)/(5) - 64*NAll numbers must be converted to binary.•ANT_REL line must be logic low (0V) in order tolock synthesizer.•Synthesizer lock is indicated by the extinguishingof the front panel LED indicator and a logic highon the fault flag line (J3 pin 1 3C).•Always verify synthesizer lock after each new dataloading.SYMPTOM CHECK INCORRECT READING (CORRECT READINGS SHOWN) INDICATES DEFECTIVE COMPONENTSYNTHESIZER FAILS TO LOCK Check DC voltages+5 V @ U301 Pin 1 U301 or associated components+8 V @ Q301 collector U302, Q301, Q302 or associated components- 5 V @ U303 Pin 1 U303 or associated componentsCheck 12.8 MHz reference signal No reference signal to front panel BNC or3V P-P, 12.8 MHz @ TP9 or U402 Pin 2 Q401Check oscillator signal11.5 1.5 dBm 125 to 180 MHz at Proceed to "Low/No RF output" belowfront panel BNCCheck prescaler output1V P-P, 2.5 MHz @ U401 Pin 4 U202, U401Check CLOCK, DATA, ENABLEWhile loading frequency data into Wrong address orsynthesizer Check 8V logic signals @ U701, U702, Q701, Q702, Q703Pins 11, 12, 13 of U402Check Phase detector output5 kHz random signal @ U501 Pin 7 U402, U501Low/No RF Output Check oscillatorLESS than 0.5 Vdc @ TP3 or collector Synthesizer not keyed (low on ANT relay line)of Q101 or Q101, Q10250 mV, 125 to 180 MHz @ TP4 Q1No Modulation Check RF chain0 dBm, 125 to 180 MHz @ TP6 U201+5 dBm, 125 to 180 MHz @ TP7 U20311.5 ±1.5 dBm to 180 MHz at front Q201panel BNCNo Modulation Check AF amplifierApply 1V, 1 kHz signal to TX/Audio/ Hi U601Check 1V signal @ TP12 or U601 Pin 1TROUBLESHOOTING GUIDETROUBLESHOOTINGA troubleshooting guide is provided showing typicalmeasurements at the various test points. The location of thetest points and adjustments are shown in Figure 2.Perform step 3 only if switch SW1 has been replaced.Otherwise go to step 4.NOTESERVICE NOTESLBI-38640G3
OUTLINE DIAGRAMVHF TRANSMITTER SYNTHESIZER BOARD19D902779G1(19D902779, Sh. 1, Rev. 13)Figure 2 - Test Point LocationsLBI-38640G4
ASSEMBLY DIAGRAM VHF TRANSMITTER SYNTHESIZER MODULE19D902780G1(19D902780, Sh. 1, Rev. 7)LBI-38640G5
SCHEMATIC DIAGRAMVHF TRANSMITTER SYNTHESIZER19D902780G1(19D902622 Sh. 1, Rev. 12)LBI-38640G6
SCHEMATIC DIAGRAMVHF TRANSMITTER SYNTHESIZER19D902780G1(19D902622, Sh. 2,Rev. 12)LBI-38640G7
SCHEMATIC DIAGRAMVHF TRANSMITTER SYNTHESIZER19D902780G1(19D902622, Sh. 3, Rev. 12)LBI-38640G8
PARTS LIST LBI-38640G9
PARTS LIST & PRODUCTION CHANGESPRODUCTION CHANGESChanges to the equipment to improve performance or to simplifycircuits are identified by a Revision Letter which is stamped after themodel number of the unit. The revision stamped on the unit includesall previous revisions. Refer to the partls List for the descriptions ofparts affected by this revision.Rev. A - Transmitter Synthsizer Board - 19D902779G1To improve reliability, changed C21, C23, C24, C25, C216,C305, L203, L204, R211, R219, R220 and R221. DeletedC26 and C212 and added C217.C21 was: 19A702236P11, 2.7 pF.C23 was: 19A702236P19, 5.6 pF.C24 was: 19A702236P9, 1.8 pF.C25 was: 19A702236P13, 3.3 pF.C216 was: 19A702236P21, 6.8 pF.C305 was: 19A705205P6, 10 µH.L203 was: 19A705470P18, 0.27 µH.L204 was: 19A705470P13, 0.10 µH.R211 was: 19B800607P100, 10 ohms.R219 was: 19B800607P221, 220 ohms.R220 was: 19B800607P270, 27 ohms.R221 was: 19B800607P221, 220 ohms.Rev. B - Transmitter Synthsizer Board - 19D9027791To improve Lock-on at low end of board and to improvestabilization of +8 volt power supply. Changed C312, R204and R310; replaced R206 with C219 and R207 with L205.C312 was: 19A702061P99, 1000 pF.R204 was: 19B80607P270, 27 ohms.Rev. C - Transmitter Synthsizer Board - 19D902779G1To improve the margin of stability on the +8 Vdc powersupply, changed C312 and R310, and added C314 andR313.C312 was: 19A705205P2, 1 µF.R310 was: 19B800607P100, 10 ohms.Rev. D - Transmitter Synthsizer Board - 19D902779G1To correct loading problem.R209 was: 100 ohms (19B801486P101).R411 was: 4.7k ohms (19B800607P472).R707 was 47k ohms (19B800607P473).REV. E - Transmitter Synthesizer Board - 19D902779G1To accommodate SOG synthesizer IC package U402 (PLCCpackage discontinued). Modified printed wire board layout(Printed wire board changed from 19D902644P1R5 to19D902644P1R6). Added new U402. U402 was19B800902P5. Installed RC compensation network resistorR314 and capacitor C315 in 10-volt regulator circuit. In-stalled item 9 RF shielding grommets (19B802690P1) ontwo BNC connectors of input/output RF ports.REV. A - Transmitter Synthesizer Module 19D902780G1To install RF shielding grommets. Installed item 9 RF shield-ing grommets (19B802690P1) on two BNC connectors ofinput/output RF ports.REV. F - Transmitter Synthesizer Board - 19D902779G1To improve marginal power output at the high end of the VHFBand (174 MHz). Changed inductor L203 from 0.18 µH(19A705470P16) to 0.15µH. Changed resistor R220 from39 ohms (19B800607P390) to 22 ohms. Inductor L203 wasa 19A705470P16. Resistor R220 was a 19B800607P390.REV. B - Transmitter Synthesizer Module 19D902780G1To install a cover that has a conductive gasket. Changeditem 3. Item 3 was a 1919D902509P2.REV. G - Transmitter Synthesizer Board 19D902779G1To increase the base current of transistor Q101 and ensuresaturation during turn on. Changed resistor R101. ResistorR101 was 19B800607P473, 47k Ohms.REV. H - Transmitter Synthesizer Board 19D902779G1To decrease the output power by approximately 1.0 dB.Changed resistor R220. Resistor R220 was19B800607P220, 22 Ohms.LBI-38640G10
IC DATAU302 & U60119A116297P7Dual Wide Band Op-AmpU40119A149944P201Dual Modulus PrescalerU501344A3070P1Operational AmplifierU50219A702705P4Quad Analog SwitchU70219A703471P320Address DecoderU701 & U70519A703483P302Quad 2-Input NAND GateU201 & U20319A705927P11Silicon Bipolar MMICU30119A704971P9+5V RegulatorU30319A704971P7-5V RegulatorU40219B800902P5/P7SynthesizerLBI-38640G11

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